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exa8_12.m

I = imread('circuit.tif'); I2 = imcrop(I,[75 68 90 112]); imview(I) imview(I2)

combi_ckt.v

// Synthesizable circuit (the "device-under-test") module CombinationalCircuit (a,b,c,d,y); input a,b,c,d; output y; reg y; always @ (a or b or c or d) y

demo.v

// Synthesizable circuit (the "device-under-test") module Demo (a,b); input a; output b; assign b = ~a; endmodule

sumarize11_3_4.m

subplot(1,2,1) imshow circuit.tif I = imcrop; subplot(1,2,2) imshow(I);

sumarize11_3_3.m

I = imread('circuit.tif'); J = imrotate(I,35,'bilinear'); subplot(1,2,1) imshow(I) subplot(1,2,2) imshow(J)

e473.m

%----------------------------------------------------------------------- % Example 4.7.3: Voltage Regulator Circuit %----------------------------------------------------------------------- % Init

funf521.m

function y = funf521(x) %------------------------------------------------------------------ % Description: Tunnel diode circuit %------------------------------------------------------------------

e273.m

%----------------------------------------------------------------------- % Example 2.7.3: DC Bridge Circuit %----------------------------------------------------------------------- % Initialize

negative.vhd

--negative.vhd correct negative number circuit library ieee ; use ieee.std_logic_1164.all; use work.components.all; entity negative is port( a : in std_logic_vector(11 downto 0);--块

k_factor.m

function [k,delta] = K_factor(s_param) % Usage: [k,delta] = K_factor(s_param) % % Purpose: returns k factor for a given s-parameter matrix % if k>1 and delta