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--negative.vhd correct negative number circuit library ieee ; use ieee.std_logic_1164.all; use work.components.all; entity negative is port( a : in std_logic_vector(11 downto 0);--块

the circuit diagram is same as the old DS1307 project. this software is still under construction. its just a beta version of the software. give it a try. if you find any bug. post it on the websit

// Test circuit for quantizer simulator lang=spectre ahdl_include "quantizer.vams" Vclk (clk 0) vsource type=pulse val1=1 period=1us Vin (in 0) vsource type=sine ampl=1 freq=5kHz sinephase=45 Qua

// Test circuit for quantizer simulator lang=spectre ahdl_include "quantizer.vams" Vclk (clk 0) vsource type=pulse val1=1 period=1us Vin (in 0) vsource type=sine ampl=1 freq=5kHz sinephase=45 Qua

Circuit: PCB_Project002 Date: 星期二 七月 18 10:39:02 2006 Total elapsed time: 0.500 seconds.

kaosState is a state diagram of how our multi-threaded OS works. The active thread yields to another thread. DSC02769.JPG is a picture of the MMC card reader circuit.

MiXeD CaSe * * This circuit contains a simple gain block to demonstrate * that the simulator deck parsing code is case-insensitive. * .TrAn 1E-5 1e-3 * V1 1 0 0.0 sIn(0 1 1k) r1 1 0 1k * A1

Model card reference * * This circuit contains simple gain blocks that share a * single .model card. * .tran 1e-5 1e-3 * v1 1 0 0.0 sin(0 1 1k) r1 1 0 1k * a1 1 2 gain_block r2 2 0 1k * a

A Berkeley SPICE3 compatible circuit * * This circuit contains only Berkeley SPICE3 components. * * The circuit is an AC coupled transistor amplifier with * a sinewave input at node "1", a gain o

Invalid parameter type * * This circuit contains a simple gain block to demonstrate * that the simulator reports an error if the parameter value * is invalid. * .tran 1e-5 1e-3 * v1 1 0 0.0 si