代码搜索：Carry
找到约 8,060 项符合「Carry」的源代码
代码结果 8,060
www.eeworm.com/read/17761/756488
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity carry_sum is
port(
sin : in vl_logic;
cin : in vl_logic;
sout : out vl_logic
www.eeworm.com/read/17761/756793
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity carry_sum is
port(
sin : in vl_logic;
cin : in vl_logic;
sout : out vl_logic
www.eeworm.com/read/17761/757168
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity carry_sum is
port(
sin : in vl_logic;
cin : in vl_logic;
sout : out vl_logic
www.eeworm.com/read/17761/757544
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity carry_sum is
port(
sin : in vl_logic;
cin : in vl_logic;
sout : out vl_logic
www.eeworm.com/read/18434/788541
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity carry_sum is
port(
sin : in vl_logic;
cin : in vl_logic;
sout : out vl_logic
www.eeworm.com/read/18434/789196
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity carry_sum is
port(
sin : in vl_logic;
cin : in vl_logic;
sout : out vl_logic
www.eeworm.com/read/460593/1560035
h bn_mul.h
/**
* \file bn_mul.h
*/
/*
* Multiply source vector [s] with b, add result
* to destination vector [d] and set carry c.
*
* Currently supports:
*
* . IA-32 (386+)
www.eeworm.com/read/249482/4449523
dat asslandat14.dat
带进位加法指令 ADC(Addition Carry)
格式: ADC OPRD1,OPRD2
----
功能: OPRD1
www.eeworm.com/read/323894/3507314
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity carry_sum is
port(
sin : in vl_logic;
cin : in vl_logic;
sout : out vl_logic
www.eeworm.com/read/298155/3873676
dat asslandat14.dat
带进位加法指令 ADC(Addition Carry)
格式: ADC OPRD1,OPRD2
----
功能: OPRD1