代码搜索：Carry
找到约 8,060 项符合「Carry」的源代码
代码结果 8,060
www.eeworm.com/read/274276/10879374
vhd count24.vhd
Library IEEE;
Use IEEE.std_logic_1164.all;
Use ieee.std_logic_unsigned.all;
Use IEEE.std_logic_arith.all;
Entity count24 is
Port(carry: in std_logic;--from 1Hz input clock or the full_index of
www.eeworm.com/read/417397/10991771
txt 加法器：generate语句的应用.txt
-- n-bit Adder using the Generate Statement
-- download from: www.fpga.com.cn & www.pld.com.cn
library IEEE;
use IEEE.Std_logic_1164.all;
ENTITY addn IS
GENERIC(n : POSITIVE := 3); --no.
www.eeworm.com/read/454493/7388288
vhd count60.vhd
Library IEEE;
Use IEEE.std_logic_1164.all;
Use ieee.std_logic_unsigned.all;
Use IEEE.std_logic_arith.all;
Entity count60 is
Port(carry: in std_logic;--from 1Hz input clock or the full_index of
www.eeworm.com/read/454493/7388296
vhd count24.vhd
Library IEEE;
Use IEEE.std_logic_1164.all;
Use ieee.std_logic_unsigned.all;
Use IEEE.std_logic_arith.all;
Entity count24 is
Port(carry: in std_logic;--from 1Hz input clock or the full_index of
www.eeworm.com/read/435744/7785960
vhd count60.vhd
Library IEEE;
Use IEEE.std_logic_1164.all;
Use ieee.std_logic_unsigned.all;
Use IEEE.std_logic_arith.all;
Entity count60 is
Port(carry: in std_logic;--from 1Hz input clock or the full_index of
www.eeworm.com/read/435744/7785987
vhd count24.vhd
Library IEEE;
Use IEEE.std_logic_1164.all;
Use ieee.std_logic_unsigned.all;
Use IEEE.std_logic_arith.all;
Entity count24 is
Port(carry: in std_logic;--from 1Hz input clock or the full_index of
www.eeworm.com/read/198238/7946412
txt 加法器：generate语句的应用.txt
-- n-bit Adder using the Generate Statement
-- download from: www.fpga.com.cn & www.pld.com.cn
library IEEE;
use IEEE.Std_logic_1164.all;
ENTITY addn IS
GENERIC(n : POSITIVE := 3); --no.
www.eeworm.com/read/198238/7946471
txt 加法器：generate语句的应用.txt
-- n-bit Adder using the Generate Statement
-- download from: www.fpga.com.cn & www.pld.com.cn
library IEEE;
use IEEE.Std_logic_1164.all;
ENTITY addn IS
GENERIC(n : POSITIVE := 3); --no.
www.eeworm.com/read/197597/7984800
txt 加法器：generate语句的应用.txt
-- n-bit Adder using the Generate Statement
-- download from: www.fpga.com.cn & www.pld.com.cn
library IEEE;
use IEEE.Std_logic_1164.all;
ENTITY addn IS
GENERIC(n : POSITIVE := 3); --no.
www.eeworm.com/read/246188/12752043
+
-- n-bit Adder using the Generate Statement
-- download from: www.fpga.com.cn & www.pld.com.cn
library IEEE;
use IEEE.Std_logic_1164.all;
ENTITY addn IS
GENERIC(n : POSITIVE := 3); --no.