代码搜索结果

function dr = drawc(c,d,f,t,p,s,F) % drawc.m Draw capacitor % 1:33 22/2/99 % % Album of Analog Filter Realizations % % Authors: Dejan V. Tosic, Miroslav D. Lutovac, 1999.02.21

clear clc close t0=0; tfinal=15; x0=[0.5;0]; %初始化，电感电流为0，电容电压为0.5v %tol=0.001; %数值计算精度 [t,x]=ode45('elecsys',t0,tfinal,x0); %elecsys是系统微分方程的描述函数 figure(1) subplot(211) plot(t,x(:,1)) title

AVR JTAG programmer-debugger Bill of materials Designator LibRef Description Footprint Comment Bolt K骴 C1 CAPSMD

% % This program generates an impedance transformation % plot in the Smith Chart and finds the input impedance of the % matching network as a function of the shunt capacitance position %

"Bill of Material for TDA7495-060512.PRJPCB" "On 2006-05-12 at 15:38:30" "Comment","Pattern","Quantity","Components" "1/8-1k","R7.5","1","R4","Resistor" "1/8-5.1k","R7.5","1","R5","Resistor"

Bill of Material for TDA7495-060512.PRJPCB On 2006-05-12 at 15:38:30 Comment Pattern Quantity Components ------------------------------------------------------------------------

"Bill of Material for TDA7495-060512.PRJPCB" "On 2006-05-12 at 15:38:30" "Comment","Pattern","Quantity","Components" "1/8-1k","R7.5","1","R4","Resistor" "1/8-5.1k","R7.5","1","R5","Resistor"

clear clc close t0=0; tfinal=15; x0=[0.5;0]; %初始化，电感电流为0，电容电压为0.5v %tol=0.001; %数值计算精度 [t,x]=ode45('elecsys',t0,tfinal,x0); %elecsys是系统微分方程的描述函数 figure(1) subplot(211) plot(t,x(:,1)) title

clear clc close t0=0; tfinal=15; x0=[0.5;0]; %初始化，电感电流为0，电容电压为0.5v %tol=0.001; %数值计算精度 [t,x]=ode45('elecsys',t0,tfinal,x0); %elecsys是系统微分方程的描述函数 figure(1) subplot(211) plot(t,x(:,1)) title

PCB FILE 4 COMP C26 Capacitor 4281 2886 63 0 10 7 4536 2815 63 0 10 7 4656 2762 1 1 2 CP 4312 2762 62 62 1 30 1 13 0 CP 4656 2762 62 62 1 30 1 13 1 CT 4312 2762 4459 2762 12 7 1 CT