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clear clc close t0=0; tfinal=15; x0=[0.5;0]; %初始化，电感电流为0，电容电压为0.5v %tol=0.001; %数值计算精度 [t,x]=ode45('elecsys',t0,tfinal,x0); %elecsys是系统微分方程的描述函数 figure(1) subplot(211) plot(t,x(:,1)) title

clear clc close t0=0; tfinal=15; x0=[0.5;0]; %初始化，电感电流为0，电容电压为0.5v %tol=0.001; %数值计算精度 [t,x]=ode45('elecsys',t0,tfinal,x0); %elecsys是系统微分方程的描述函数 figure(1) subplot(211) plot(t,x(:,1)) title

PART LIST ========================== Ref. Description Value Manufacturer C1

% % This file generates the graph for Example 1.4 % "RF impedance response of capacitor" % % Copyright (c) 1999 by P.Bretchko and R.Ludwig % "RF Circuit Design: Theory and Practice" %

BOM 868 MHz operation CC1020EMX, revision 2.0 BOM taken from schematic SHE, 2004-08-11 Removed FIDUCIAL_MARK --------------------------------------------------------------------------

#ifndef _Put_Cut_H #define _Put_Cut_H void Switch_Put_Cut_Capacitor (void); #endif

-------------------------------------------------------------------------------- Parts List CADSTAR Design Editor Version 8.0.0.5 Design:

/* =========================================================================== FILE ifspec.ifs MEMBER OF process XSPICE Copyright 1991 Georgia Tech Research Corporation Atlanta, Georgia 30332 All

-- ----------------------------------------------------------- -- -- Additional material to the book -- Modeling and Simulation for RF System Design -- -- -- THIS MODEL IS LICENSED TO YOU "AS IT IS"

% % This file generates the graph for Example 1.4 % "RF impedance response of capacitor" % % Copyright (c) 1999 by P.Bretchko and R.Ludwig % "RF Circuit Design: Theory and Practice" %