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h cache.h

/* $Id: cache.h,v 1.9 1999/08/14 03:51:58 anton Exp $ * cache.h: Cache specific code for the Sparc. These include flushing * and direct tag/data line access. * * Copyright (C) 1995 Dav
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h cache.h

/* $Id: cache.h,v 1.3 2000/02/04 07:40:53 ralf Exp $ * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this
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h cache.h

/* $Id: cache.h,v 1.4 2000/02/04 07:40:53 ralf Exp $ * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this
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h cache.h

/* * include/asm-sparc64/cache.h */ #ifndef __ARCH_SPARC64_CACHE_H #define __ARCH_SPARC64_CACHE_H /* bytes per L1 cache line */ #define L1_CACHE_BYTES 32 /* Two 16-byte sub-blocks per line.
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h cache.h

#ifndef __LINUX_CACHE_H #define __LINUX_CACHE_H #include #ifndef L1_CACHE_ALIGN #define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)) #endif #ifndef SMP_CACHE_BYTES
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h cache.h

/* * include/linux/nfsd/cache.h * * Request reply cache. This was heavily inspired by the * implementation in 4.3BSD/4.4BSD. * * Copyright (C) 1995, 1996 Olaf Kirch */ #ifn
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h cache.h

#ifndef _ASM_IA64_CACHE_H #define _ASM_IA64_CACHE_H #include /* * Copyright (C) 1998-2000 Hewlett-Packard Co * Copyright (C) 1998-2000 David Mosberger-Tang */
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h cache.h

/* * include/asm-i386/cache.h */ #ifndef __ARCH_I386_CACHE_H #define __ARCH_I386_CACHE_H #include /* L1 cache line size */ #define L1_CACHE_SHIFT (CONFIG_X86_L1_CACHE_SHIFT) #defi
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h cache.h

/* * include/asm-m68k/cache.h */ #ifndef __ARCH_M68K_CACHE_H #define __ARCH_M68K_CACHE_H /* bytes per L1 cache line */ #define L1_CACHE_BYTES 16 #endif
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h cache.h

/* * include/asm-s390/cache.h * * S390 version * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation * * Derived from "include/asm-i386/cache.h" * Copyright (C) 1992,
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