代码搜索：Cache
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www.eeworm.com/read/480930/1308229
h cache.h
#ifndef __LINUX_CACHE_H
#define __LINUX_CACHE_H
#include
#include
#ifndef L1_CACHE_ALIGN
#define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1))
#endi
www.eeworm.com/read/480930/1308256
h cache.h
/*
* include/linux/nfsd/cache.h
*
* Request reply cache. This was heavily inspired by the
* implementation in 4.3BSD/4.4BSD.
*
* Copyright (C) 1995, 1996 Olaf Kirch
*/
#ifn
www.eeworm.com/read/480930/1309438
h cache.h
#ifndef _ASM_IA64_CACHE_H
#define _ASM_IA64_CACHE_H
#include
/*
* Copyright (C) 1998-2000 Hewlett-Packard Co
* Copyright (C) 1998-2000 David Mosberger-Tang
*/
www.eeworm.com/read/480930/1309631
h cache.h
/*
* include/asm-i386/cache.h
*/
#ifndef __ARCH_I386_CACHE_H
#define __ARCH_I386_CACHE_H
#include
/* L1 cache line size */
#define L1_CACHE_SHIFT (CONFIG_X86_L1_CACHE_SHIFT)
#defi
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h cache.h
#ifndef _ASM_CACHE_H
#define _ASM_CACHE_H
/* Etrax 100LX have 32-byte cache-lines. When we add support for future chips
* here should be a check for CPU type.
*/
#define L1_CACHE_BYTES 32
#endif
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h cache.h
/*
* include/asm-m68k/cache.h
*/
#ifndef __ARCH_M68K_CACHE_H
#define __ARCH_M68K_CACHE_H
/* bytes per L1 cache line */
#define L1_CACHE_BYTES 16
#endif
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h cache.h
/*
* include/asm-s390/cache.h
*
* S390 version
* Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
*
* Derived from "include/asm-i386/cache.h"
* Copyright (C) 1992,
www.eeworm.com/read/480930/1310078
h cache.h
/*
* linux/include/asm-arm/proc-armv/cache.h
*
* Copyright (C) 1999-2001 Russell King
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU G
www.eeworm.com/read/480930/1310184
h cache.h
/*
* linux/include/asm-arm/proc-armo/cache.h
*
* Copyright (C) 1999-2001 Russell King
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU G