代码搜索：Cache
找到约 10,000 项符合「Cache」的源代码
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www.eeworm.com/read/489431/1224329
cache gitk.cache
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e37827f43c34ae2c54f0167a846965da70dfa39a 09e5934752bf9dc60eed8810372b548dfbb5305d 09e5934752bf9dc60eed8810372b548dfbb5305d
e93a27fa145fa9bd26c0a01c3bc1f2cf8b5312ee e37827f43c34ae2c54f0167a846965da
www.eeworm.com/read/488601/1228495
c cache.c
/*
* Copyright (c) 2006-2008
* Author: Weiming Zhou
*
* Permission to use, copy, modify, distribute and sell this software
* and its documentation for any purpose is hereby granted without f
www.eeworm.com/read/488601/1228576
h cache.h
/*
* Copyright (c) 2006-2008
* Author: Weiming Zhou
*
* Permission to use, copy, modify, distribute and sell this software
* and its documentation for any purpose is hereby granted without f
www.eeworm.com/read/487320/1237317
c cache.c
#include "instr.h"
#include "emul.h"
int
decode_cache(MIPS_State* mstate, Instr instr) //Use in Cache Instruction, it's unuseable in R3000
{
// CP0 is usable in kernel mode or when the CU bit i
www.eeworm.com/read/487320/1237319
h cache.h
#ifndef _CACHE_H_
#define _CACHE_H_
#include "types.h"
/* This header describes a physically-indexed, physically-taged MIPS cache.
* Both direct mapped and n-way set-associative caches are supporte
www.eeworm.com/read/487320/1237348
c cache.c
#include "armdefs.h"
/* mmu cache init
*
* @cache_t :cache_t to init
* @width :cache line width in byte
* @way :way of each cache set
* @set :cache set num
*
* $ -1: error
* 0: sucess
*/