代码搜索:CPLD FPGA

找到约 10,000 项符合「CPLD FPGA」的源代码

代码结果 10,000
www.eeworm.com/read/422567/10629798

h cpld.h

#define pLED (volatile unsigned char *)0x203C0000 #define p7Section (volatile unsigned char *)0x203C4000 #define pCtrlReg1 (volatile unsigned char *)0x203C8000 #define pCtrlReg2 (volati
www.eeworm.com/read/349984/10778632

h cpld.h

#include "mcf5307.h" #define IO_BASE_ADDR 0x30400000 #define OUT_VALVE0 0x00 #define OUT_VALVE1 0x01 #define OUT_VALVE2 0x02 #define OUT_GAIN 0x03 #define OUT_PUMP 0x04 #define OUT_S
www.eeworm.com/read/419554/10861243

h cpld.h

#include #include #include #include #include #define CLKIN (27.0e6) // clockin frequency in Hz #define CORECLK (540.0e6)
www.eeworm.com/read/419553/10861317

h cpld.h

#include #include #include #include #include #define CLKIN (30.0e6) // clockin frequency in Hz #define CORECLK (600.0e6)
www.eeworm.com/read/419549/10861437

h cpld.h

#include #include #include #include #include #define CLKIN (27.0e6) // clockin frequency in Hz #define CORECLK (594.0e6)
www.eeworm.com/read/271446/10995907

h cpld.h

#include #include #include #include #include #define CLKIN (27.0e6) // clockin frequency in Hz #define CORECLK (540.0e6)
www.eeworm.com/read/271446/10995969

h cpld.h

#include #include #include #include #include #define CLKIN (30.0e6) // clockin frequency in Hz #define CORECLK (600.0e6)
www.eeworm.com/read/271446/10996032

h cpld.h

#include #include #include #include #include #define CLKIN (30.0e6) // clockin frequency in Hz #define CORECLK (600.0e6)
www.eeworm.com/read/271446/10996078

h cpld.h

#include #include #include #include #include #define CLKIN (27.0e6) // clockin frequency in Hz #define CORECLK (540.0e6)
www.eeworm.com/read/271446/10996127

h cpld.h

#include #include #include #include #include #define CLKIN (27.0e6) // clockin frequency in Hz #define CORECLK (594.0e6)