代码搜索：CPLD FPGA
找到约 10,000 项符合「CPLD FPGA」的源代码
代码结果 10,000
www.eeworm.com/read/359123/10165370
h cpld.h
/*****************************************************************************/
/*function: this header file has defined the registers' addresses and register's bit defination */
/*
www.eeworm.com/read/358544/10185442
ise cpld.ise
www.eeworm.com/read/358544/10185601
dhp cpld.dhp
www.eeworm.com/read/358544/10185627
ptf cpld.ptf
[my]
Fit=true
Generate Programming File=true
Implement Design=true
Translate=false
[top.ucf]
User Constraints=true
[xc95144xl-10tq144 - XST Verilog]
Design Entry Utilities=false
www.eeworm.com/read/358544/10185645
gfl cpld.gfl
# Verilog : PDCL (jhdparse)
__projnav/TOP_jhdparse_tcl.rsp
# Implmentation : Lock Pins (CPLD flow)
__projnav/top_TO_lc_tcl.rsp
top._lc
last_used.ngd
top.cmd_log
# xst flow : RunXST
top.syr
to
www.eeworm.com/read/279023/10482258
c cpld.c
/*H*****************************************************************************
*
* $Archive:: $
* $Revision::
www.eeworm.com/read/279023/10482270
h cpld.h
/*H***************************************************************************
*
* $Archive:: $
* $Revision::
www.eeworm.com/read/277658/10613767
h cpld.h
#ifndef __BF533_CPLD_DEFINED
#define __BF533_CPLD_DEFINED
/************************************************************/
/* define base addresses */
/***
www.eeworm.com/read/422572/10629497
h cpld.h
/************************************************************/
/* define base addresses */
/************************************************************/
#def
www.eeworm.com/read/422571/10629577
h cpld.h
/************************************************************/
/* define base addresses */
/************************************************************/
#def