代码搜索：CPLD FPGA
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www.eeworm.com/read/17540/737681
cpld
/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to
www.eeworm.com/read/17540/737682
cpld
library ieee;
Use ieee.std_logic_1164.all;
Entity csout is
port(data:in std_logic_vector(7 downto 0);
cs:in std_logic;
dout:out std_logic_vector(7 downto 0)
);
end csout;
www.eeworm.com/read/17540/737683
cpld
dff_8_inst : dff_8 PORT MAP(
clock => clock_sig,
data => data_sig,
q => q_sig
);
www.eeworm.com/read/17540/737684
cpld
/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to
www.eeworm.com/read/17540/737685
cpld
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
entity rxt is
port(
mclk_16:in std_logic;--16倍baud
rx:in std_logic;--读，复位，和接收端
data:out std_logic_vector(7 downto
www.eeworm.com/read/17540/737686
cpld
-- megafunction wizard: %LPM_CONSTANT%
-- GENERATION: STANDARD
-- VERSION: WM1.0
-- MODULE: lpm_constant
-- ============================================================
-- File Name: CONSTANT.
www.eeworm.com/read/17540/737687
cpld
//刚才是串口发，这里是串口收的程序：
#include
#include
#include
#include
static HANDLE hComm;
static DCB Current_Comm_dcb = {0};
static DCB Previous_Comm_dcb = {0};
stat
www.eeworm.com/read/17540/737688
cpld
DFF_inst : DFF PORT MAP(
clock => clock_sig,
data => data_sig,
q => q_sig
);
www.eeworm.com/read/17540/737689
cpld
package defcon is
constant sreg_width :integer:=20;
end defcon;
use work.defcon.all;
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
e
www.eeworm.com/read/17540/737690
cpld
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY cDELED10 IS
PORT( LIN:IN STD_LOGIC_VECTOR(3 DOWNTO 0);
cs:in std_logic;
LOUT:OUT STD_LOGIC_VECTOR