代码搜索:CCD驱动

找到约 10,000 项符合「CCD驱动」的源代码

代码结果 10,000
www.eeworm.com/read/425044/10385300

bsf ccd_dr.bsf

/* WARNING: Do NOT edit the input and output ports in this file in a text editor if you plan to continue editing the block that represents it in the Block Editor! File corruption is VERY likely to
www.eeworm.com/read/425044/10385315

pin ccd_dr.pin

-- Copyright (C) 1991-2007 Altera Corporation -- Your use of Altera Corporation's design tools, logic functions -- and other software and tools, and its AMPP partner logic -- functions, and a
www.eeworm.com/read/352269/10569184

ddb ccd1501.ddb

[Design Root] Version=1.0.0 [Directory] Schlib1.Lib=SchLib ccd.Sch=Sch Sheet1.Sch=Sch [Schlib1.Lib] Editor Kind=SchLib [ccd.Sch] Editor Kind=Sch [Sheet1.Sch] Editor Kind=Sch
www.eeworm.com/read/351814/10607305

v ccd_capture.v

module CCD_Capture( oDATA, oDVAL, oX_Cont, oY_Cont, oFrame_Cont, iDATA, iFVAL, iLVAL, iSTART, iEND, iCLK, iRST ); input [9:0]
www.eeworm.com/read/421318/10741195

dpf rs_ccd.dpf

www.eeworm.com/read/421318/10741203

pof rs_ccd.pof

www.eeworm.com/read/421318/10741209

cdf rs_ccd.cdf

/* Quartus II Version 7.2 Build 151 09/26/2007 SJ Full Version */ JedecChain; FileRevision(JESD32A); DefaultMfr(6E); P ActionCode(Cfg) Device PartName(EPM3256AQ208) Path("D:/CCDVHDL/ICX408
www.eeworm.com/read/421318/10741223

vhd rs_ccd.vhd

library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_arith.all; use ieee.std_logic_unsigned.all; entity rs_ccd is port( CLK,START,ACLK,SUBTIME: in std_logic; RG,H1,H2,J
www.eeworm.com/read/421318/10741235

qsf rs_ccd.qsf

# Copyright (C) 1991-2007 Altera Corporation # Your use of Altera Corporation's design tools, logic functions # and other software and tools, and its AMPP partner logic # functions, and any outpu
www.eeworm.com/read/421318/10741276

pin rs_ccd.pin

-- Copyright (C) 1991-2007 Altera Corporation -- Your use of Altera Corporation's design tools, logic functions -- and other software and tools, and its AMPP partner logic -- functions, and a