代码搜索:CASE

找到约 10,000 项符合「CASE」的源代码

代码结果 10,000
www.eeworm.com/read/344679/11868555

m case57.m

function [baseMVA, bus, gen, branch, areas, gencost] = case57 %CASE57 Power flow data for IEEE 57 bus test case. % Please see 'help caseformat' for details on the case file format. % This data
www.eeworm.com/read/155032/11903627

ico desktop case.ico

www.eeworm.com/read/257911/11906822

m case30.m

function [baseMVA, bus, gen, branch, areas, gencost] = case30 %CASE30 Power flow data for 30 bus, 6 generator case. % Please see 'help caseformat' for details on the case file format. % % Based
www.eeworm.com/read/257911/11906851

m case300.m

function [baseMVA, bus, gen, branch, areas, gencost] = case300 %CASE300 Power flow data for IEEE 300 bus test case. % Please see 'help caseformat' for details on the case file format. % This da
www.eeworm.com/read/257911/11906941

m case118.m

function [baseMVA, bus, gen, branch, areas, gencost] = case118 %CASE118 Power flow data for IEEE 118 bus test case. % Please see 'help caseformat' for details on the case file format. % This da
www.eeworm.com/read/257911/11907020

m case14.m

function [baseMVA, bus, gen, branch, areas, gencost] = case14 %CASE14 Power flow data for IEEE 14 bus test case. % Please see 'help caseformat' for details on the case file format. % This data
www.eeworm.com/read/257911/11907107

m case9.m

function [baseMVA, bus, gen, branch, areas, gencost] = case9 %CASE9 Power flow data for 9 bus, 3 generator case. % Please see 'help caseformat' for details on the case file format. % % Based on
www.eeworm.com/read/257911/11907130

m case39.m

function [baseMVA, bus, gen, branch, areas, gencost] = case39 %CASE39 Power flow data for 39 bus case. % Please see 'help caseformat' for details on the case file format. % % Based on data from
www.eeworm.com/read/257911/11907322

m case57.m

function [baseMVA, bus, gen, branch, areas, gencost] = case57 %CASE57 Power flow data for IEEE 57 bus test case. % Please see 'help caseformat' for details on the case file format. % This data
www.eeworm.com/read/257336/11933482

v mux_case.v

module mux_case(out,in0,in1,in2,in3,sel); output out; input in0,in1,in2,in3; input[1:0] sel; reg out; always @(in0 or in1 or in2 or in3 or sel) begin case(sel) 2'b00: out=in0; 2'b01: out=