代码搜索：CASE
找到约 10,000 项符合「CASE」的源代码
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m case9.m
function [baseMVA, bus, gen, branch, area, gencost] = case
%CASE Defines the power flow data in a format similar to PTI.
% [baseMVA, bus, gen, branch, area, gencost] = case
% The format for
www.eeworm.com/read/309747/13664982
m case57.m
function [baseMVA, bus, gen, branch, area, gencost] = case57
% 09/25/93 UW ARCHIVE 100.0 1961 W IEEE 57 Bus Test Case
% The test system data is written in matpower format
baseMVA = 1
www.eeworm.com/read/309084/13682566
m case300.m
function [baseMVA, bus, gen, branch, areas, gencost] = case300
%CASE300 Power flow data for IEEE 300 bus test case.
% Please see 'help caseformat' for details on the case file format.
% This da
www.eeworm.com/read/309084/13682567
m case118.m
function [baseMVA, bus, gen, branch, areas, gencost] = case118
%CASE118 Power flow data for IEEE 118 bus test case.
% Please see 'help caseformat' for details on the case file format.
% This da
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m case9.m
function [baseMVA, bus, gen, branch, areas, gencost] = case9
%CASE9 Power flow data for 9 bus, 3 generator case.
% Please see 'help caseformat' for details on the case file format.
%
% Based on
www.eeworm.com/read/307658/13717852
v mux_case.v
module mux_case(out,in0,in1,in2,in3,sel);
output out;
input in0,in1,in2,in3;
input[1:0] sel;
reg out;
always @(in0 or in1 or in2 or in3 or sel)
begin
case(sel)
2'b00: out=in0;
2'b01: out=
www.eeworm.com/read/307020/13732955
acf case3.acf
--
-- Copyright (C) 1988-1999 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any
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v case3.v
//*********************************************************
// IEEE STD 1364-1995 Verilog file: case3.v
// Author-EMAIL: Uwe.Meyer-Baese@ieee.org
//************************************************
www.eeworm.com/read/307020/13733065
v case3.v
//*********************************************************
// IEEE STD 1364-1995 Verilog file: case3.v
// Author-EMAIL: Uwe.Meyer-Baese@ieee.org
//************************************************
www.eeworm.com/read/307020/13733113
v case3.v
//*********************************************************
// IEEE STD 1364-1995 Verilog file: case3.v
// Author-EMAIL: Uwe.Meyer-Baese@ieee.org
//************************************************