代码搜索:CAN Bus

找到约 10,000 项符合「CAN Bus」的源代码

代码结果 10,000
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mcp can_recv.mcp

[HEADER] magic_cookie={66E99B07-E706-4689-9E80-9B2582898A13} file_version=1.0 device=PIC18F458 [PATH_INFO] BuildDirPolicy=BuildDirIsProjectDir dir_src= dir_bin= dir_tmp= dir_sin= dir_inc= d
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c #can_t.c

#include "can.h" #define LEN 8 void transmit (char MsgNum,char *p,char len) /*将*p数据写入can消息发送,len为数据长度*/ { char i; SFRPAGE = CAN0_PAGE; CAN0ADR = IF1CMDMSK; CAN0DAT = 0x0087;
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v can_registers.v

// synopsys translate_off `include "timescale.v" // synopsys translate_on `include "can_defines.v" module can_registers ( clk, rst, cs, we, addr, data_in, data_out, i
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prj can_registers.prj

verilog work can_register_asyn_syn.v verilog work can_register_asyn.v verilog work can_register.v verilog work can_registers.v
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lso can_registers.lso

DEFAULT_SEARCH_ORDER
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ndo can_testbench.ndo

## NOTE: Do not edit this file. ## Auto generated by Project Navigator for VHDL Post-Translate Simulation ## vlib work ## Compile Post-Translate Model for Module can_top vcom -87 -explicit can_t
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prj can_fifo.prj

verilog work can_fifo.v
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v can_ibo.v

// This module only inverts bit order module can_ibo ( di, do ); input [7:0] di; output [7:0] do; assign do[0] = di[7]; assign do[1] = di[6]; assign do[2] = di[5]; assign do
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lso can_top.lso

work
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syr can_fifo.syr

Release 6.1i - xst G.23 Copyright (c) 1995-2003 Xilinx, Inc. All rights reserved. --> Parameter TMPDIR set to __projnav CPU : 0.00 / 0.22 s | Elapsed : 0.00 / 0.00 s --> Parameter xsthdpdir set to