代码搜索：Because
找到约 10,000 项符合「Because」的源代码
代码结果 10,000
www.eeworm.com/read/470720/1444660
c mmx1.c
// PR optimization/4994
// This testcase ICEd because movsi was not supporting direct
// mmx -> mmx register moves.
// { dg-do compile }
// { dg-options "-O2" }
// { dg-options "-fno-exceptions -O2 -m
www.eeworm.com/read/470720/1444667
c conj2.c
// PR target/6043
// This testcase ICEd on IA-64 because emit_group_store
// did not handle loading CONCAT from register group
// { dg-do compile }
struct C
{
C (double y, double z) { __real__ x =
www.eeworm.com/read/470720/1450455
c 20020213-1.c
/* PR c/5681
This testcase failed on IA-32 at -O0, because safe_from_p
incorrectly assumed it is safe to first write into a.a2 b-1
and then read the original value from it. */
int bar (floa
www.eeworm.com/read/470720/1451362
c 20020309-2.c
/* This testcase ICEd on IA-32 at -O2, because loop was calling convert_modes
between a MODE_FLOAT and MODE_INT class modes. */
typedef union
{
double d;
long long ll;
} A;
void
foo (A x, A
www.eeworm.com/read/470720/1451710
c 20020411-1.c
/* PR c/6223
This testcase ICEd in internal check because a constant was not truncated
for its mode. */
/* { dg-do compile } */
/* { dg-options "-O2" } */
/* { dg-options "-O2 -march=i686" { ta
www.eeworm.com/read/470720/1451893
c 20020523-2.c
/* PR target/6753
This testcase was miscompiled because sse_mov?fcc_const0*
patterns were missing earlyclobber. */
/* { dg-do run { target i386-*-* } } */
/* { dg-options "-march=pentium3 -msse
www.eeworm.com/read/470720/1452089
c 20020523-1.c
/* PR target/6753
This testcase was miscompiled because sse_mov?fcc_const0*
patterns were missing earlyclobber. */
/* { dg-do run { target i386-*-* } } */
/* { dg-options "-march=pentium3 -msse
www.eeworm.com/read/470720/1452510
c 20020116-1.c
/* This testcase ICEd on Alpha because ldq_u argument was not subject to
small_symbolic_mem_operand splitting. */
/* { dg-do compile } */
/* { dg-options "-O2" } */
/* { dg-options "-O2 -fpic -mex
www.eeworm.com/read/470693/1456584
c strength-reduce.c
// This testcase was miscompiled on s390x, because strength-reduction
// did not see biv in C::foo as used after loop, but it was used
// in a REG_EQUAL note.
// { dg-do run }
// { dg-options "-O2" }
www.eeworm.com/read/470693/1456606
c mmx1.c
// PR optimization/4994
// This testcase ICEd because movsi was not supporting direct
// mmx -> mmx register moves.
// { dg-do compile }
// { dg-options "-O2" }
// { dg-options "-fno-exceptions -O2 -m