代码搜索:Assignment

找到约 8,196 项符合「Assignment」的源代码

代码结果 8,196
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tcl fir_q_constraints.tcl

# This file contains the necessary constraints to achieve FIR size and speed # requirements. It is machine generated and should not be modified. # # Constraint file information: # Quartus Version
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tcl fir_ssb_constraints.tcl

# This file contains the necessary constraints to achieve FIR size and speed # requirements. It is machine generated and should not be modified. # # Constraint file information: # Quartus Version
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tcl fir_ssb_constraints.tcl

# This file contains the necessary constraints to achieve FIR size and speed # requirements. It is machine generated and should not be modified. # # Constraint file information: # Quartus Version
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tcl fff_constraints.tcl

# This file contains the necessary constraints to achieve FIR size and speed # requirements. It is machine generated and should not be modified. # # Constraint file information: # Quartus Version
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tcl fir32a_constraints.tcl

# This file contains the necessary constraints to achieve FIR size and speed # requirements. It is machine generated and should not be modified. # # Constraint file information: # Quartus Version
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tcl fir_compiler_constraints.tcl

# This file contains the necessary constraints to achieve FIR size and speed # requirements. It is machine generated and should not be modified. # # Constraint file information: # Quartus Version
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v2 jamfile.v2

# Boost.MultiIndex tests Jamfile # # Copyright 2003-2004 Joaqu韓 M L髉ez Mu駉z. # Distributed under the Boost Software License, Version 1.0. # (See accompanying file LICENSE_1_0.txt or copy at # htt
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ctl ss7160.ctl

DEVICE_OPTIONS: XC95144-15-PQ160 DT_SYNTHESIS:TRUE MC9500_INPUT_LIMIT:36 CREATE_LOCAL_FEEDBACK:TRUE CREATE_PIN_FEEDBACK:TRUE FM_PARTITION:TRUE GSR_OPT:TRUE FASTCLOCK_OPT:TRUE FOE_OPT:TRUE MC9
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txt led七段译码.txt

-- BCD to Seven Segment Decoder -- The use of the std_logic literal '-' (don't care) is primarily for the synthesis tool. -- This example illustrates the use of the selected signal assignment. --
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txt led七段譯碼.txt

-- BCD to Seven Segment Decoder -- The use of the std_logic literal '-' (don't care) is primarily for the synthesis tool. -- This example illustrates the use of the selected signal assignment. --