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找到约 10,000 项符合 Analog 的代码

analog_models2_ac.deck

Code Model Test - Swept DC: int, d_dt, s_xfer, core, lcouple * * *** analysis type *** .ac dec 10 10 1000 * * *** input sources *** * v1 1 0 1.0 AC 1.0 0.0 * * *** integrator block *** a1

analog_models1_ac.deck

Code Model Test - AC: gain, summer, mult, divide, pwl * * *** analysis type *** .ac dec 10 10 1000 * *** input sources *** * v1 1 0 1.0 AC 1.0 0.0 * v2 2 0 1.0 AC 1.0 0.0 * v3 3 0 DC 2.0

analog_models3_ac.deck

Code Model Test - AC: hyst, limit, ilimit, climit, cmeter, lmeter * * *** analysis type *** .ac dec 10 10 1000 * * *** input sources *** * v1 1 0 1.0 AC 1.0 0.0 * v2 2 0 DC 10.0 * v3 3 0

analog_models2_transient.deck

Code Model Test - Transient: int, d_dt, s_xfer, core, lcouple * * *** analysis type *** .tran .1s 10s * *** input sources *** * v1 1 0 DC PWL(0 0 10 10) * v2 2 0 DC PWL(0 0 0.1 0.1 0.2

analog_models3_dc.deck

Code Model Test - DC: hyst, limit, ilimit, climit, cmeter, lmeter * * *** analysis type *** .op * *** input sources *** v1 1 0 DC 1.0 * v2 2 0 DC 10.0 * v3 3 0 DC -10.0 * * * *** hyst b

analog_models1_transient.deck

Code Model Test - Transient: gain, summer, mult, divide, pwl * * *** analysis type *** .tran .1s 10s * *** input sources *** * v1 1 0 DC PWL(0 0 10 10) * v2 2 0 DC 2 * *** gain block ***

analog_models1_dc.deck

Code Model Test - DC: gain, summer, mult, divide, pwl * * *** analysis type *** .op * *** input sources *** v1 1 0 DC 2 * v2 2 0 DC 2 * *** gain block *** a1 1 10 gain1 .model gain1 gai

analog_models4_ac.deck

Code Model Test - DC: sine, triangle, aswitch, zener, oneshot * * *** analysis type *** .ac dec 10 10 1000 * * *** input sources *** * v1 1 0 1.0 AC 1.0 0.0 * v2 2 0 DC 1.0 * v3 3 0 DC 1.

analog_models2_dc.deck

Code Model Test - DC: int, d_dt, s_xfer, core, lcouple * * *** analysis type *** .op * *** input sources *** v1 1 0 DC 1.0 * * * * *** integrator block *** a1 1 10 int1 .model int1 int

analog_models4_dc.deck

Code Model Test - DC: sine triangle aswitch zener oneshot * * *** analysis type *** .op * *** input sources *** v1 1 0 DC 1.0 * v2 2 0 DC 1.0 * v3 3 0 DC 1.0 * * *** sine block *** a1 1