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[Design] Version=1.0 HierarchyMode=0 ChannelRoomNamingStyle=0 OutputPath= ChannelDesignatorFormatString=$Component_$RoomName ChannelRoomLevelSeperator=_ OpenOutputs=1 ArchiveProject=0 Timesta

Record=TopLevelDocument|FileName=Analog Amplifier.schdoc

Analog Amplifier Date: 星期三 十二月 6 15:40:04 2006 *AC sweep option[temp] run 1 of 6 (t1) option[temp] 27 -> 0 *AC sweep option[temp] run 2 of 6 (t2) option[temp] 27 ->

Analog Amplifier *SPICE Netlist generated by Advanced Sim server on 2006-12-6 15:40:03 *Schematic Netlist: XAR? 0 INV VCC VEE OUTPUT AD645A RF INV OUTPUT 100k RI INPUT INV 10k RL OUTPUT 0 25k

Circuit: Analog Amplifier Date: 星期三 十二月 6 15:40:04 2006 Total elapsed time: 0.657 seconds.

[Design] Version=1.0 HierarchyMode=0 ChannelRoomNamingStyle=0 OutputPath=Out ChannelDesignatorFormatString=$Component_$RoomName ChannelRoomLevelSeperator=_ OpenOutputs=1 ArchiveProject=0 Time

[Analyses Setup] DCAnalysis=False ACAnalysis=False TransientAnalysis=True TransferFunction=False NoiseAnalysis=False Multimeter=False ParamSweep=False TempSweep=False MonteCarlo=False Always