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ARM 的代码
hal_arm_sa2sim.cdl
# ====================================================================
#
# hal_arm_sa2sim.cdl
#
# Intel StrongARM II Simulator HAL package configuration data
# (sim is called "CASSA2";
mlt_arm_iq80310_rom.h
// eCos memory layout - Tue Sep 05 18:46:49 2000
// This is a generated file - do not edit
#ifndef __ASSEMBLER__
#include
#include
#endif
#define CYGMEM_REGION_ram
mlt_arm_iq80310_roma.h
// eCos memory layout - Sun Jan 14 22:42:04 2001
// This is a generated file - do not edit
#ifndef __ASSEMBLER__
#include
#include
#endif
#define CYGMEM_REGION_vec
mlt_arm_iq80310_roma.ldi
// eCos memory layout - Sun Jan 14 22:42:04 2001
// This is a generated file - do not edit
#include
MEMORY
{
vecs : ORIGIN = 0, LENGTH = 0x1000
rom : ORIGIN = 0x400
mlt_arm_iq80310_roma.mlt
version 0
region vecs 0 1000 1 !
region rom 40000 7c0000 1 !
region ram a0000000 2000000 0 !
section fixed_vectors 0 1 0 1 1 0 1 0 20 20 !
section rom_vectors 0 1 0 1 1 1 1 1 40000 40000 text text !
s
mlt_arm_iq80310_ram.h
// eCos memory layout - Tue Sep 05 16:58:21 2000
// This is a generated file - do not edit
#ifndef __ASSEMBLER__
#include
#include
#endif
#define CYGMEM_REGION_ram
mlt_arm_iq80310_rom.mlt
version 0
region ram a0000000 2000000 0 !
region rom 00000000 800000 1 !
section fixed_vectors 0 1 0 1 1 0 1 0 20 20 !
section data 0 1 1 1 1 1 0 0 8000 bss !
section bss 0 4 0 1 0 1 0 1 heap1 heap1 !
mlt_arm_iq80310_rom.ldi
// eCos memory layout - Tue Sep 05 18:46:49 2000
// This is a generated file - do not edit
#include
MEMORY
{
ram : ORIGIN = 0xA0000000, LENGTH = 0x2000000
rom : O
mlt_arm_iq80310_ram.ldi
// eCos memory layout - Tue Sep 05 16:58:21 2000
// This is a generated file - do not edit
#include
MEMORY
{
vrom : ORIGIN = 0x00000000, LENGTH = 0x1000
ram : ORIG
ser_arm_edb7xxx.cdl
# ====================================================================
#
# ser_arm_edb7xxx.cdl
#
# eCos serial ARM/EDB7XXX configuration data
#
# ============================================