代码搜索：辅同步信号
找到约 10,000 项符合「辅同步信号」的源代码
代码结果 10,000
www.eeworm.com/read/356003/3044794
properties passport_zh_tw.properties
#
err_invalid_time=超出伺服器時間同步間隔
err_user_not_exist=用戶不存在！
err_uid_empty=用戶ID不能為空！
err_nick_empty=用戶呢稱不能為空！
err_uid_exist=用戶帳戶已存在！
www.eeworm.com/read/394237/8241465
vhd cntm60.vhd
--库文件，包说明
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
--实体说明一个模为60的同步计数器
ENTITY CNTM60 IS
PORT(NRST:IN STD_LOGIC;--异步复位端口
LD:IN STD_LOGIC;--置数端口
CI:IN
www.eeworm.com/read/237057/13979556
m tvv.m
close all;
clear all;
clc;
%%%%%行消隐、 行同步的复合 %%%%%
fs=25e6; %fs=25M , 1/fs=0.00000004.
t=0:0.00000004:0.05; %采样点数为1250001
tn=t+0.00016:0.00000004:0.05+0.00016;
yx1=1-((square(2*pi*50*tn,8.06
www.eeworm.com/read/192552/8375547
m demodulation.m
function demod_out = demodulation(demod_in,mod_mode)
%%*************************************************************************
%%Function information:
%%由信道信号的复数值解调对应的二进制序列(In this program,the c
www.eeworm.com/read/192551/8375584
m demodulation.m
function demod_out = demodulation(demod_in,mod_mode)
%%*************************************************************************
%%Function information:
%%由信道信号的复数值解调对应的二进制序列(In this program,the c
www.eeworm.com/read/192305/8388360
m exa030307.m
%---------------------------------------------------------------------------------------
% exa030307.m, for example 3.3.7 and fig 3.3.7
% 说明多普勒信号的WVD;
%
% 注：在该程序中，用到了子程序 tfrwv.m,
% 还要用到
www.eeworm.com/read/192305/8388485
m exa030306.m
%---------------------------------------------------------------------------------------
% exa030306.m, for example 3.3.6 and fig 3.3.6
% 说明高斯线性调频信号的WVD;
%
% 注：在该程序中，用到了子程序 tfrpwv.m,
%
www.eeworm.com/read/391285/8412293
m demodulation.m
function demod_out = demodulation(demod_in,mod_mode)
%%*************************************************************************
%%Function information:
%%由信道信号的复数值解调对应的二进制序列(In this program,the c
www.eeworm.com/read/389471/8517743
txt 2.txt
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity digital_clk is
port(clk:in std_logic;--------------------------------------------------时钟信号
clr:in
www.eeworm.com/read/389471/8518033
txt ok.txt
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity digital_clk is
port(clk:in std_logic;--------------------------------------------------时钟信号
clr:in