代码搜索:电阻元件

找到约 3,633 项符合「电阻元件」的源代码

代码结果 3,633
www.eeworm.com/read/324473/13261684

v full_add5.v

module full_add5(a,b,cin,sum,cout); input a,b,cin; output sum,cout; reg cout,m1,m2,m3; //在always块中被赋值的变量应定义为reg型 wire s1; xor x1(s1,a,b); //调用门元件 always @(a or b or cin) //
www.eeworm.com/read/137539/13313943

v full_add5.v

module full_add5(a,b,cin,sum,cout); input a,b,cin; output sum,cout; reg cout,m1,m2,m3; //在always块中被赋值的变量应定义为reg型 wire s1; xor x1(s1,a,b); //调用门元件 always @(a or b or cin) //
www.eeworm.com/read/318986/13464750

v full_add5.v

module full_add5(a,b,cin,sum,cout); input a,b,cin; output sum,cout; reg cout,m1,m2,m3; //在always块中被赋值的变量应定义为reg型 wire s1; xor x1(s1,a,b); //调用门元件 always @(a or b or cin) //
www.eeworm.com/read/307658/13717891

v full_add5.v

module full_add5(a,b,cin,sum,cout); input a,b,cin; output sum,cout; reg cout,m1,m2,m3; //在always块中被赋值的变量应定义为reg型 wire s1; xor x1(s1,a,b); //调用门元件 always @(a or b or cin) //
www.eeworm.com/read/306749/13738822

v full_add5.v

module full_add5(a,b,cin,sum,cout); input a,b,cin; output sum,cout; reg cout,m1,m2,m3; //在always块中被赋值的变量应定义为reg型 wire s1; xor x1(s1,a,b); //调用门元件 always @(a or b or cin) //
www.eeworm.com/read/304991/13781299

v full_add5.v

module full_add5(a,b,cin,sum,cout); input a,b,cin; output sum,cout; reg cout,m1,m2,m3; //在always块中被赋值的变量应定义为reg型 wire s1; xor x1(s1,a,b); //调用门元件 always @(a or b or cin) //
www.eeworm.com/read/304990/13781378

v full_add5.v

module full_add5(a,b,cin,sum,cout); input a,b,cin; output sum,cout; reg cout,m1,m2,m3; //在always块中被赋值的变量应定义为reg型 wire s1; xor x1(s1,a,b); //调用门元件 always @(a or b or cin) //
www.eeworm.com/read/304989/13781457

v full_add5.v

module full_add5(a,b,cin,sum,cout); input a,b,cin; output sum,cout; reg cout,m1,m2,m3; //在always块中被赋值的变量应定义为reg型 wire s1; xor x1(s1,a,b); //调用门元件 always @(a or b or cin) //
www.eeworm.com/read/304988/13781536

v full_add5.v

module full_add5(a,b,cin,sum,cout); input a,b,cin; output sum,cout; reg cout,m1,m2,m3; //在always块中被赋值的变量应定义为reg型 wire s1; xor x1(s1,a,b); //调用门元件 always @(a or b or cin) //
www.eeworm.com/read/304987/13781615

v full_add5.v

module full_add5(a,b,cin,sum,cout); input a,b,cin; output sum,cout; reg cout,m1,m2,m3; //在always块中被赋值的变量应定义为reg型 wire s1; xor x1(s1,a,b); //调用门元件 always @(a or b or cin) //