代码搜索:时钟提取

找到约 10,000 项符合「时钟提取」的源代码

代码结果 10,000
www.eeworm.com/read/494049/6387154

asm atime.asm

; “验证式” 实验三 电子时钟(定时/记数定时实验) ljmp Start Hour equ 40h Minute equ 41h Second equ 42h C100us equ 43h Tick equ 10000 T100us e
www.eeworm.com/read/493216/6398706

c ili9320.c

#include "stm32f10x_lib.h" #include "ili9320.h" #include "ili9320_font.h" void Lcd_Configuration(void) { GPIO_InitTypeDef GPIO_InitStructure; /*开启相应时钟 */ RCC_APB2PeriphClockCmd(RCC_APB2Pe
www.eeworm.com/read/487245/6517112

h rom.h

#include #include #include #define _Nop() _nop_() sbit sdar= P2^0; /*串行数据*/ sbit sclr= P2^1; /*串行时钟*/ sbit jk=P0^0; bit ACK_flagr; /*****************
www.eeworm.com/read/486798/6529539

h ds1302ram.h

#ifndef _DS1302_ZHENGZUOWEI_H_ #define _DS1302_ZHENGZUOWEI_H_ /*********************************************** PORTD.2为DS1302使能控制引脚 PORTD.3为DS1302时钟控制引脚 PORTD.3为DS1302数据控制引脚 ********************
www.eeworm.com/read/486030/6541763

c ad9852_test.c

//AD9852测试程序 //********************************************** #include #include //包含右移 #include sbit UPDCLK = P0^0; //20 更新时钟,上升沿锁存数据到编程寄存器 sbit MRESET = P0^1; /
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c text1.c

//AD9852测试程序 //********************************************** #include #include //包含右移 #include sbit UPDCLK = P3^4; //20 更新时钟,上升沿锁存数据到编程寄存器 sbit WRCLK = P3^
www.eeworm.com/read/478253/6722793

vhd seq_check.vhd

LIBRARY IEEE ; USE IEEE.STD_LOGIC_1164.ALL; ENTITY seq_check IS PORT(DIN,clk,clr:IN STD_LOGIC; --串行输入数据位/工作时钟/复位信号 AB:OUT STD_LOGIC_VECTOR(3 DOWNTO 0)); --检测结果输出 END seq_check;
www.eeworm.com/read/409880/11308460

v clock_gen.v

// Clock_Gen.v /****************为LCD_Drvier模块产生500Hz的时钟信号**************/ module Clock_Gen(clk_48M,rst,clk_LCD); input clk_48M,rst; //rst为全局复位信号(高电平有效) output cl
www.eeworm.com/read/407465/11419228

plg clock.plg

礦ision3 Build Log Project: G:\单片机\时钟\clock.uv2 Project File Date: 07/11/2008 Output:
www.eeworm.com/read/406844/11434611

vhd minsecondaa.vhd

library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; entity MINSECOND is port(clk,clr:in std_logic;----时钟/清零信号 sec1,sec0:out std_logic_vector(3 downto 0);----秒高位/低位