代码搜索：交通仿真

找到约 10,000 项符合「交通仿真」的源代码

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热门代码： main.c GPIO I2C SPI UART timer interrupt ADC PWM LED
www.eeworm.com/read/198978/7898425

m newsom123.m

close all echo on % NEWSOM----创建自组织网络 % TRAIN----对自组织网络进行训练 % SIM----对自组织网络进行仿真 pause clc % 产生样本数据P P=[0.045944 0.747493 50 132 25; 0.046046 0.711557 48 128 25; 0.08173 0.68346 52 140
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www.eeworm.com/read/397919/8016133

plg ioextend.plg

礦ision2 Build Log Project: D:\Proteus 6.7\JJJ仿真电路\8051单片机\串口扩展\kelic\IOextend.uv2 Project File Date: 02/26/2008 Output: Build target 'Target 1
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www.eeworm.com/read/397591/8036227

plg liwan.plg

礦ision2 Build Log Project: E:\软件备份\单片机软件\Proteus\JJJ仿真电路\李婉\Keil\LiWan.uv2 Project File Date: 05/25/2005 Output: Build target 'Target 1' comp
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www.eeworm.com/read/397591/8036341

plg lcd1602.plg

礦ision2 Build Log Project: G:\软件备份\Proteus 6.7\JJJ仿真电路\字符液晶1602\Keil\LCD1602.uv2 Project File Date: 09/18/2005 Output: Build target 'Target 1'
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www.eeworm.com/read/397591/8036449

plg playmusic.plg

礦ision2 Build Log Project: E:\软件备份\单片机软件\Proteus\JJJ仿真电路\播放音乐\Keil\PlayMusic.uv2 Project File Date: 09/16/2005 Output: Build target 'Target 1'
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www.eeworm.com/read/247000/12693280

m ch10_01.m

%设置调制信号的相数（调制信号是介于0和xSignalLevel-1之间的整数 clear all; clc; xSignalLevel = 8; %设置调制信号的抽样间隔 xSampleTime = 1/100000; %设置仿真时间长度 xSimulationTime = 10; %设置随机数产生器的初始化种子 xInitialSeed = 37; %x表示信噪比的取值范围
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www.eeworm.com/read/144884/12764504

asv bfskmain.asv

clc clear echo on %x表示信噪比 x=0:15; % y表示信号的误比特率，它的长度与x相同 y=x; % BFSK调制的频率间隔等于24kHz FrequencySeparation=24000; % 信源产生信号的bit率等于10kbit/s BitRate=10000; % 仿真时间设置为10秒 SimulatonTime=10; % BFSK调制
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www.eeworm.com/read/144884/12764507

m bfskmain.m

clc clear echo on %x表示信噪比 x=0:15; % y表示信号的误比特率，它的长度与x相同 y=x; % BFSK调制的频率间隔等于24kHz FrequencySeparation=24000; % 信源产生信号的bit率等于10kbit/s BitRate=10000; % 仿真时间设置为10秒 SimulatonTime=10; % BFSK调制
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www.eeworm.com/read/144329/12802088

plg liwan.plg

礦ision2 Build Log Project: E:\软件备份\单片机软件\Proteus\JJJ仿真电路\李婉\Keil\LiWan.uv2 Project File Date: 05/25/2005 Output: Build target 'Target 1' comp
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www.eeworm.com/read/144329/12802179

plg lcd1602.plg

礦ision2 Build Log Project: G:\软件备份\Proteus 6.7\JJJ仿真电路\字符液晶1602\Keil\LCD1602.uv2 Project File Date: 09/18/2005 Output: Build target 'Target 1'
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