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加密解密 This program applies Message Digest MD5 Algorithm Developed by Maimouna Al-ammar 5th Year, Compu
This program applies Message Digest MD5 Algorithm
Developed by Maimouna Al-ammar
5th Year, Computer Engineering Department, University of Damascus
Information and Network Security Material
软件设计/软件工程 Imp java questions. very important for java interview for experienced professional more than 1 year
Imp java questions. very important for java interview for experienced professional more than 1 year
allegro VHDL,Verilog,System verilog比较
 
本文简单讨论并总结了VHDL、Verilog，System verilog 这三中语言的各自特点和区别As the number of enhancements to variousHardware Description Languages (HDLs) hasincreased over the past year, so too has the complexityof determining which language is best fora particular design. Many designers ...
电源技术 VISHAY元器件应用
Each year Vishay releases thousands of new components that enable our customers to create new and superior end products. We recognize that offering unique component solutions helps improve the performance of next-generation devices, overcome technical barriers, and create new markets.
电源技术 SKS-100 Single Output Switchin
Features:   High efficiency, high reliability, low cost  AC input range selected by switch  100% full load burn-in test  Protections: Short circuit / Over load  Fixed switching frequency at 25KHz  Cooling by free air convection  1 year warranty   Dim ...
单片机编程 数字钟显示电路
SHUZIZHONG显示电路
源程序如下：
#include <reg51.h>#include <intrins.h>
unsigned char data dis_digit;
unsigned char code dis_code[]={ 0x3f,0x06,0x5b,0x4f,0x66,0x6d,0x7d,0x07,0x7f,0x6f,0x77,0x7c,0x39,0x5e,0x79,0x71};unsigned char data dis_buf[16];unsigned char data dis_index;char hour,min,sec,wang,yea ...
传感与控制 5位数LCD型显示表（无电源式）
特点 精确度0.1%满刻度 &plusmn;1位数 显示范围-19999-99999可任意规划 可直接量测直流电流/直流电压,无需另接辅助电源 尺寸小(24x48x50mm),稳定性高 分离式端子,配线容易 CE 认证 2.主要規格 辅助电源: None 精确度: 0.1% F.S. &plusmn;1 digit(1-100%F.S.) 输入抗阻 : >100Mohm(<2V range) >2Mohm(<2Vrange) < 0.25VA(cur ...
开发工具 单片机12864液晶时钟显示程序
12864液晶时钟显示程序
LCD 地址变量
;**************变量的定义*****************
RS&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; BIT&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; P2.0&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; ;LCD数据/命令选择端(H/L)
RW&nbsp;&nb ...
可编程逻辑 VHDL,Verilog,System verilog比较
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本文简单讨论并总结了VHDL、Verilog，System verilog 这三中语言的各自特点和区别As the number of enhancements to variousHardware Description Languages (HDLs) hasincreased over the past year, so too has the complexityof determining which language is best fora particular design. Many designers ...
测试测量 XAPP713 -Virtex-4 RocketIO误码率测试器
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The data plane of the reference design consists of a configurable multi-channel XBERT modulethat generates and checks high-speed serial data transmitted and received by the MGTs. Eachchannel in the XBERT module consists of two MGTs (MGTA and MGTB), which physicallyoccupy one MGT tile in t ...