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VHDL/FPGA/Verilog * DESCRIPTION: DDS design BY PLD DEVICES. * * AUTHOR: Sun Yu * * HISTORY: 12/06/2002 *
* DESCRIPTION: DDS design BY PLD DEVICES.
*
* AUTHOR: Sun Yu
*
* HISTORY: 12/06/2002
*
VHDL/FPGA/Verilog * DESCRIPTION: DDS design BY PLD DEVICES. * * AUTHOR: Sun Yu * * HISTORY: 12/06/2002 *
* DESCRIPTION: DDS design BY PLD DEVICES.
*
* AUTHOR: Sun Yu
*
* HISTORY: 12/06/2002
*
嵌入式/单片机编程 A six people s rushing replies an implement, use some s switches in toggle switch K0 ~ K5 is that ON
A six people s rushing replies an implement, use some s switches in toggle switch K0 ~ K5 is that ON accomplishes when rushing to reply button , nobody rush to answer, 6 numerical code circulation takes turns at demonstrating 1 ~ 6 (horse races) , who rushes to reply the numerical code stops having ...
网络 initial working phase of the design of said editor, featuring multicasting, advanced linux keyboard
initial working phase of the design of said editor,
featuring multicasting, advanced linux keyboard handling,
sub-hierarchical expansion, and multiple cursors (similar
to the concept found in moonedit). The author respectfully requests your compliance with the GPL
单片机开发 用Dio驱动switch的一款步进电机
用Dio驱动switch的一款步进电机，只要四个io口输出一定的脉冲序列就可以了
VC书籍 DFIR design. Short iintroduction about DIR design.
DFIR design. Short iintroduction about DIR design.
其他书籍 design guide for lcd with backlight source
design guide for lcd with backlight source
软件工程 proe design guide with databook
proe design guide with databook
软件设计/软件工程 power pcb 教程
power pcb 教程
电子书籍 LOW POWER MIMO Signal Processing
LOW POWER MIMO Signal Processing