搜索结果
找到约 250 项符合
steady-state 的查询结果
可编程逻辑 Creating Safe State Machines(Mentor)
 
Finite state machines are widely used in digital circuit designs. Generally, when designing a state machine using an HDL, the synthesis tools will optimize away all states that cannot be reached and generate a highly optimized circuit. Sometimes, however, the optimization is not acceptabl ...
Linux/Unix编程 Unique net-enabled GUI system based state of the art coding solutions with strong XML support.
Unique net-enabled GUI system based state of the art coding solutions with strong XML support.
VHDL/FPGA/Verilog State.Machine.Coding.Styles.for.Synthesis（状态机
State.Machine.Coding.Styles.for.Synthesis（状态机，英文,VHDL）
技术管理 企业存储的市场细分：芯片存储（Solid State Disk ）I/O瓶颈的根本解决方案
企业存储的市场细分：芯片存储（Solid State Disk ）I/O瓶颈的根本解决方案
嵌入式/单片机编程 Solid State Voice Recorder Using Flash MSP430
Solid State Voice Recorder Using Flash MSP430
网络 Optimized Link State Routing是IETF正在研究的、用于移动式无线行动网络（这里
Optimized Link State Routing是IETF正在研究的、用于移动式无线行动网络（这里，不仅终端用户可移动，路由器和服务器等也可以）的几个协议之一。该项目的实施弥补了Hipercom项目的一个内容。
微处理器开发 This zip describes switching the AT91RM9200 in IDLE state. Includes main.html file for help.
This zip describes switching the AT91RM9200 in IDLE state. Includes main.html file for help.
Java编程 j2EE设计模式之State模式demo.
j2EE设计模式之State模式demo.
VHDL/FPGA/Verilog -- State machine for reading data from Dallas 1621 -- -- Testsystem for i2c controller
-- State machine for reading data from Dallas 1621
--
-- Testsystem for i2c controller
VHDL/FPGA/Verilog -- Moore State Machine with explicit state encoding -- dowload from: www.fpga.com.cn & www.pld.com.
-- Moore State Machine with explicit state encoding
-- dowload from: www.fpga.com.cn & www.pld.com.cn