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通讯/手机编程 iic总线控制器VHDL实现 -- VHDL Source Files: i2c.vhd -- top level file i2c_control.vhd -- control
iic总线控制器VHDL实现
-- VHDL Source Files:
i2c.vhd -- top level file
i2c_control.vhd -- control function for the I2C master/slave
shift.vhd -- shift register
uc_interface.vhd -- uC interface function for an 8-bit 68000-like uC
upcnt4.vhd -- 4-bit up counter
i2c_timesim.vhd -- po ...
GPS编程 gps design guide,for low level study
gps design guide,for low level study
驱动编程 low level hook to record mouse and keyobard events and play back
low level hook to record mouse and keyobard events and play back
其他 It about c++ senior traing course. it very usefull for someone who want to enhance c++ programing. i
It about c++ senior traing course. it very usefull for someone who want to enhance c++ programing. it comes frome hua wei company s traning course
其他 Log Shifter Gate Level Design using Verilog(IC design Lab) and Lab Note
Log Shifter Gate Level Design using Verilog(IC design Lab) and Lab Note
VHDL/FPGA/Verilog ADPLL of high level phase locked loop
ADPLL of high level phase locked loop
matlab例程 MATLAB is a high-level language for technical computing which is often used by engineers to help the
MATLAB is a high-level language for technical computing which is often used by engineers to help them design systems or analyse a system’s behaviour.
其他 Newnes.Digital.Signal.Processing.System.Level.Design.Using.LabVIEW.Jun.2005.eBook-DDU labview信号处理
Newnes.Digital.Signal.Processing.System.Level.Design.Using.LabVIEW.Jun.2005.eBook-DDU
labview信号处理教材。
其他书籍 Debugging with GDB, The GNU Source-Level Debugger Ninth Exlition,for GDB version6.6
Debugging with GDB,
The GNU Source-Level Debugger
Ninth Exlition,for GDB version6.6
单片机开发 This file (the project file) contains information at the project level and is used to build a sing
This file (the project file) contains information at the project level and
is used to build a single project or subproject. Other users can share the
project (.dsp) file, but they