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找到约 680 项符合 second-Level 的查询结果

可编程逻辑 《器件封装用户向导》赛灵思产品封装资料

Introduction to Xilinx Packaging Electronic packages are interconnectable housings for semiconductor devices. The major functions of the electronic packages are to provide electrical interconnections between the IC and the board and to efficiently remove heat generated by the device. Feature sizes a ...
https://www.eeworm.com/dl/kbcluoji/39540.html
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可编程逻辑 提升PCB设计能力的一本好书The Circuit Designers Companion

The Circuit Designer’s Companion Second edition Tim Williams
https://www.eeworm.com/dl/kbcluoji/39676.html
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可编程逻辑 XAPP228 -Virtex器件内的四端口存储器

This application note describes how the existing dual-port block memories in the Spartan™-IIand Virtex™ families can be used as Quad-Port memories. This essentially involves a dataaccess time (halved) versus functionality (doubled) trade-off. The overall bandwidth of the blockmemory in ...
https://www.eeworm.com/dl/kbcluoji/40055.html
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可编程逻辑 WP200-将Spartan-3 FPGA用作远程数码相机的低成本控制器

  The introduction of Spartan-3™ devices has createdmultiple changes in the evolution of embedded controldesigns and pushed processing capabilities to the “almostfreestage.” With these new FPGAs falling under $20, involume, with over 1 million system gates, and under $5for ...
https://www.eeworm.com/dl/kbcluoji/40080.html
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可编程逻辑 WP409利用Xilinx FPGA打造出高端比特精度和周期精度浮点DSP算法实现方案

WP409利用Xilinx FPGA打造出高端比特精度和周期精度浮点DSP算法实现方案: High-Level Implementation of Bit- and Cycle-Accurate Floating-Point DSP Algorithms with Xilinx FPGAs
https://www.eeworm.com/dl/kbcluoji/40106.html
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可编程逻辑 Verilog Coding Style for Efficient Digital Design

  In this paper, we discuss efficient coding and design styles using verilog. This can beimmensely helpful for any digital designer initiating designs. Here, we address different problems rangingfrom RTL-Gate Level simulation mismatch to race conditions in writing behavioral models. All the ...
https://www.eeworm.com/dl/kbcluoji/40128.html
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可编程逻辑 US Navy VHDL Modelling Guide

  This document was developed under the Standard Hardware and Reliability Program (SHARP) TechnologyIndependent Representation of Electronic Products (TIREP) project. It is intended for use by VHSIC HardwareDescription Language (VHDL) design engineers and is offered as guidance for the deve ...
https://www.eeworm.com/dl/kbcluoji/40131.html
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可编程逻辑 FPGA设计重利用方法(Design Reuse Methodology)

  FPGAs have changed dramatically since Xilinx first introduced them just 15 years ago. In thepast, FPGA were primarily used for prototyping and lower volume applications; custom ASICswere used for high volume, cost sensitive designs. FPGAs had also been too expensive and tooslow for many a ...
https://www.eeworm.com/dl/kbcluoji/40133.html
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可编程逻辑 数字与模拟电路设计技巧

数字与模拟电路设计技巧IC与LSI的功能大幅提升使得高压电路与电力电路除外,几乎所有的电路都是由半导体组件所构成,虽然半导体组件高速、高频化时会有EMI的困扰,不过为了充分发挥半导体组件应有的性能,电路板设计与封装技术仍具有决定性的影响。 模拟与数字技术的融合由于IC与LSI半导体本身的高速化,同时为了使机器达到 ...
https://www.eeworm.com/dl/kbcluoji/40348.html
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可编程逻辑 UART 4 UART参考设计,Xilinx提供VHDL代码

UART 4 UART参考设计,Xilinx提供VHDL代码 uart_vhdl This zip file contains the following folders:  \vhdl_source  -- Source VHDL files:      uart.vhd  - top level file      txmit.vhd - transmit portion of uart  &nb ...
https://www.eeworm.com/dl/kbcluoji/40395.html
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