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VHDL/FPGA/Verilog This a vhdl programme for realise an electron watch by max-plus II. The function includes time showi
This a vhdl programme for realise an electron watch by max-plus II. The function includes time showing and time setting. It may be extended to other functions like alarming clock and so forth.
DSP编程 VDSP++打开。This directory contains an example ADSP-BF537 RTC project that does a basic blink routine a
VDSP++打开。This directory contains an example ADSP-BF537 RTC project that does a basic blink routine and
then puts the part in deep sleep mode to be woken up from a RTC Stopwatch Event. Once woken up,
the RTC is reconfigured to toggle the EZ KIT LEDs using RTC second, minute, hour, and day interrup ...
其他书籍 The TMS320C64x™ DSPs (including the TMS320DM642 device) are the highest-performance fixed-point
The TMS320C64x&#8482 DSPs (including the TMS320DM642 device) are the highest-performance fixed-point
DSP generation in the TMS320C6000&#8482 DSP platform. The TMS320DM642 (DM642) device is based on
the second-generation high-performance, advanced VelociTI&#8482 very-long-instruction-word (VLIW)
arch ...
其他嵌入式/单片机内容 ST7529液晶驱动 The ST7529 is a driver & controller LSI for 32 gray scale graphic dot-matrix liquid cryst
ST7529液晶驱动 The ST7529 is a driver & controller LSI for 32 gray scale graphic dot-matrix liquid crystal display systems. It generates 255
Segment and 160 Common driver circuits. This chip is connected directly to a microprocessor, accepts Serial Peripheral
Interface (SPI), 8-bit/16-bit parallel o ...
单片机开发 非常好的一个I2C软件包。本模拟I2C软件包包含了I2C操作的底层子程序
非常好的一个I2C软件包。本模拟I2C软件包包含了I2C操作的底层子程序，使用前要定义
好SCL和SDA。在标准8051模式(12 Clock)下,对主频要求是不高于12MHz(即1个
机器周期1us) 若Fosc>12MHz则要增加相应的NOP指令数。(总线时序符合I2C标
准模式,100Kbit/S) ...
VC书籍 名称：read2543 功能：TLC2543驱动模块 输入参数：port通道号 输出参数：ad转换值 *************************************/
名称：read2543
功能：TLC2543驱动模块
输入参数：port通道号
输出参数：ad转换值
*************************************/
uint read2543(uchar port)
{
uint ad=0,i
CLOCK=0
_CS=0
port<<=4
for(i=0 i<12 i++)
{
if(D_OUT) ad|=0x01
D_IN=(bit)(port&0x80)
CLOCK=1
delay(3)
CLOCK=0
delay(3)
port<<= ...
驱动编程 This the third edition of the Writing Device Drivers articles. The first article helped to simply ge
This the third edition of the Writing Device Drivers articles. The first article helped to simply get you acquainted with device drivers and a simple framework for developing a device driver for NT. The second tutorial attempted to show to use IOCTLs and display what the memory layout of Windows NT ...
电子书籍 Designing Storage Area Networks - A Practical Reference For Implementing Fibre Channel And Ip Sans,
Designing Storage Area Networks - A Practical Reference For Implementing Fibre Channel And Ip Sans, Second Edition
单片机开发 This example program shows how to configure PCA Module 4 as a watchdog timer. In this example, the
This example program shows how to configure PCA Module 4 as a
watchdog timer. In this example, the watchdog is configured to
overflow after 0xFF00 clock cycles.
通讯/手机编程 The algorm of viterbi. You talk to your friend three days in a row and discover that on the first da
The algorm of viterbi. You talk to your friend three days in a row and discover that on the first day he went for a walk, on the second day he went shopping, and on the third day he cleaned his apartment. You have two questions: What is the overall probability of this sequence of observations? And w ...