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uCOS 基于ARM的uCOS-II完整源码,在VC++ WINDOWN下的编程. 利用VC++直接编译显示图形.便于源码的调试.首先下载uC/OS-II - WIN32 Port for 32bit Wind
基于ARM的uCOS-II完整源码,在VC++ WINDOWN下的编程. 利用VC++直接编译显示图形.便于源码的调试.首先下载uC/OS-II - WIN32 Port for 32bit Windows Operating Systems
嵌入式/单片机编程 嵌入式系统开发 TOPPERS and JSP Kernel Release 1.3 TOPPERS = Toyohashi Open Platform for Embedded Real-Tim
嵌入式系统开发
TOPPERS and JSP Kernel Release 1.3
TOPPERS = Toyohashi Open Platform for Embedded Real-Time Systems
JSP = Just Standard Profile Kernel
嵌入式/单片机编程 用于motorala 68K系列处理器的小实时多任务操作系统 The OMU Kernel was written to provide a cut-down Unix-like O/S for a
用于motorala 68K系列处理器的小实时多任务操作系统
The OMU Kernel was written to provide a cut-down Unix-like O/S for a
home-made 6809-based home computer built by me, Steven Hosgood, in the
early 1980s. This package contains the RTOS version of omu68k, derived
from a port of the original 6809 code to ...
VC书籍 a very good tv play for c and c++ believe it or not
a very good tv play for c and c++ believe it or not
Delphi控件源码 Ehlib.v3.4.for.Delphi5678.rar是DELPHI的三方控件源码.此控件适用于DELPHI5,6,7,8.
Ehlib.v3.4.for.Delphi5678.rar是DELPHI的三方控件源码.此控件适用于DELPHI5,6,7,8.
软件工程 Electronic design automation (EDA) company providing logic synthesis and analysis tools for FPGA and
Electronic design automation (EDA) company providing logic synthesis and analysis tools for FPGA and ASIC designers.
其他 crack for SYNPLICITY80
crack for SYNPLICITY80
VHDL/FPGA/Verilog crack for ModelSim, a Verilog, VHDL and mixed VHDL / Verilog CAD simulator for FPGA, board and IC de
crack for ModelSim, a Verilog, VHDL and mixed VHDL / Verilog CAD simulator for FPGA, board and IC design.
其他 FPGAadvantage61Crack.rar is for MentorGraphics高端设计工具FPGAAdvantage
FPGAadvantage61Crack.rar is for MentorGraphics高端设计工具FPGAAdvantage
软件设计/软件工程 Capability Maturity Model Integration, Version 1.1 CMMI for Systems Engineering and Software Engine
Capability Maturity Model Integration, Version 1.1
CMMI for Systems Engineering and Software Engineering