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加密解密 VHDL implementation of the twofish cipher for 128,192 and 256 bit keys. The implementation is in li
VHDL implementation of the twofish cipher for 128,192 and 256 bit keys.
The implementation is in library-like form All needed components up to, including the round/key schedule circuits are implemented, giving the flexibility to be combined in different architectures (iterative, rolled out/pipeline ...
VHDL/FPGA/Verilog The Hilbert Transform is an important component in communication systems, e.g. for single sideband m
The Hilbert Transform is an important component in communication systems, e.g. for single sideband modulation/demodulation, amplitude and phase detection, etc. It can be formulated as filtering operation which makes it possible to approximate the Hilbert Transform with a digital filter. Due to the n ...
并行计算 This control is another extension to the now standard and widely used ListView control. I have inclu
This control is another extension to the now standard and widely used ListView control. I have included some of the more common features: shaded columns, column sorting (with data type), but the real addition is the FILTERBAR features of the header. This implementation eliminates all of the work of ...
其他书籍 Cisco E-DI supports perl scripting through the CLI. This feature automates many of the server and n
Cisco E-DI supports perl scripting through the CLI. This feature automates many of the server and
network administration tasks. This section explains how to enable and disable the perl scripting service,
and how to use Cisco E-DI Perl API for daily tasks.
When a perl script is implemented by an admi ...
其他 function [r_path, r_cost] = dijkstra(pathS, pathE, transmat) The Dijkstra s algorithm, Implemente
function [r_path, r_cost] = dijkstra(pathS, pathE, transmat)
The Dijkstra s algorithm, Implemented by Yi Wang, 2005
This version support detecting _cyclic-paths_
DSP编程 this introduce infinite impulse response (IIR) filters. The filters are designed in MATLAB using th
this introduce infinite impulse response (IIR) filters. The filters are designed in MATLAB using the fdatool. They are then implemented in VisualDSP++.
VHDL/FPGA/Verilog In this work an implementation of a geometric nonlinear controller for chaos synchronization in a Fi
In this work an implementation of a geometric nonlinear controller for chaos synchronization in a Field Programmable Gate Array (FPGA) is presented. The Lorenz chaotic system is used to show the implementation of chaos synchronization via nonlinear controller implemented in a Xilinx FPGA Virtex-II 2 ...
其他嵌入式/单片机内容 A AVR USB download tool. It can download your target file to full series avr chip with only one pre
A AVR USB download tool. It can download your target file to full series avr chip with only one press.
其他 主要操作过程： 建立一般的二叉链表
主要操作过程：
建立一般的二叉链表，通过遍历进行线化，设p为当前处理结点，pre为p的前驱填标志：
若p无左：p->ltag=1；若p无右：p—>rtag=1；填线索：若p->ltag==1: p->lchild=pre 若pre->rtag== pre->rchild=p
通讯编程文档 This is a simulator written in Tcl to simulate a network node carrying GSM and GPRS traffics with Qo
This is a simulator written in Tcl to simulate a network node carrying GSM and GPRS traffics with QoS mechanisms. The payload type including circuit-switched voice, VoIP and web traffic, and the performance including packet drop, delay can be analyzed. The implemented QoS mechanism is DiffServ, with ...