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教程资料 WP369可扩展式处理平台-各种嵌入式系统的理想解决方案
WP369可扩展式处理平台-各种嵌入式系统的理想解决方案 :Delivering unrivaled levels of system performance,flexibility, scalability, and integration to developers,Xilinx's architecture for a new Extensible Processing Platform is optimized for system power, cost, and size. Based on ARM's dual-c ...
教程资料 扩频通信芯片STEL-2000A的FPGA实现
针对传统集成电路(ASIC)功能固定、升级困难等缺点,利用FPGA实现了扩频通信芯片STEL-2000A的核心功能。使用ISE提供的DDS IP核实现NCO模块,在下变频模块调用了硬核乘法器并引入CIC滤波器进行低通滤波,给出了DQPSK解调的原理和实现方法,推导出一种简便的引入?仔/4固定相移的实现方法。采用模块化的设计方法使用VHDL语言 ...
教程资料 Virtex-5 GTP Transceiver Wizar
The LogiCORE™ GTP Wizard automates the task of creating HDL wrappers to configure the high-speed serial GTP transceivers in Virtex™-5 LXT and SXT devices. The menu-driven interface allows one or more GTP transceivers to be configured using pre-definedtemplates for popular industry standa ...
嵌入式综合 1-Wire总线主机
Abstract: Communication with 1-Wire slave devices requires a 1-Wire master. There are numerous ways to build a 1-Wire master (see reference design 4206, "Choosing the Right 1-Wire Master for Embedded Applications"). Thisdocument describes the DS1WM, a synthesizable 1-Wire master that can be implem ...
嵌入式综合 NIOSII用户定制指令
With the Altera Nios II embedded processor, you as the system designercan accelerate time-critical software algorithms by adding custominstructions to the Nios II processor instruction set. Using custominstructions, you can reduce a complex sequence of standard instructionsto a single instruction im ...
无线通信 克服了正交频分复用(OFDM)和IEEE 1901.2智能电网通信的挑战
Abstract: While many questions still surround the creation and deployment of the smart grid, the need for a reliablecommunications infrastructure is indisputable. Developers of the IEEE 1901.2 standard identified difficult channel conditionscharacteristic of low-frequency powerline communications ...
无线通信 多径信道下OFDM系统定时同步算法
文中在pre-FFT定时同步算法的基础上提出一个新的定时同步算法及其改进算法,该算法利用规则集对相关函数和导函数优化的方法得以进一步减小估计方差,本文在给出其推导过程的基础上给出了仿真结果,并与相关算法进行比较,结果表明新算法的定时估计精度较高且具有一定的鲁棒性。
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ARM LPC315x系列ARM微控制器用户手册
The NXP LPC315x combine an 180 MHz ARM926EJ-S CPU core, High-speed USB 2.0OTG, 192 KB SRAM, NAND flash controller, flexible external bus interface, an integratedaudio codec, Li-ion charger, Real-Time Clock (RTC), and a myriad of serial and parallelinterfaces in a single chip targeted at consumer, in ...
开发工具 单片机12864液晶时钟显示程序
12864液晶时钟显示程序
LCD 地址变量
;**************变量的定义*****************
RS             BIT      P2.0            ;LCD数据/命令选择端(H/L)
RW &nb ...
可编程逻辑 Nios II定制指令用户指南
     Nios II定制指令用户指南:With the Altera Nios II embedded processor, you as the system designer can accelerate time-critical software algorithms by adding custom instructions to the Nios II processor instruction set. Using custom
instructions, you can reduce a complex sequen ...