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可编程逻辑 使用Artix-7 FPGA 降低您的系统功耗与成本
As businesses and consumers expect more fromportable electronics, the FPGA industry has beencompelled to re-think how it serves these low-power,cost-sensitive markets. Application classes like
可编程逻辑 采用TÜV认证的FPGA开发功能安全系统
This white paper discusses how market trends, the need for increased productivity, and new legislation have
accelerated the use of safety systems in industrial machinery. This TÜV-qualified FPGA design methodology is
changing the paradigms of safety designs and will greatly reduce development e ...
可编程逻辑 protel 99se 使用技巧以及常见问题解决方法
protel 99se 使用技巧以及常见问题解决方法：里面有一些protel 99se 特别技巧，还有我们经常遇到的一些问题！如何使一条走线至两个不同位置零件的距离相同?
您可先在Design/Rule/High Speed/Matched Net Lengths的规则中来新增规则设定,最后再用Tools/EqualizeNet Lengths 来等长化即可。
Q02、在SCHLIB中造一零件其PIN的 ...
可编程逻辑 Xilinx的Zynq可扩展式处理平台(EPP)电子教材
Abstract: This reference design explains how to power the Xilinx Zynq Extensible Processing Platform (EPP) and peripheral ICs using
可编程逻辑 XAPP440 - Xilinx CPLD的上电性能
Applying power to a standard logic chip, SRAM, or EPROM, usually results in output pinstracking the applied voltage as it rises. Programmable logic attempts to emulate that behavior,but physics forbids perfect emulation, due to the device programmability. It requires care tospecify the pin behavio ...
可编程逻辑 XAPP144 -设计CPLD多电压系统
Today’s digital systems combine a myriad of chips with different voltage configurations.Designers must interface 2.5V processors with 3.3V memories—both RAM and ROM—as wellas 5V buses and multiple peripheral chips. Each chip has specific power supply needs. CPLDsare ideal for han ...
可编程逻辑 WP264-在数字视频应用中使用CPLD
 
The CoolRunner-II CPLD is a highly uniform family of fast, low-power devices. Theunderlying architecture is a traditional CPLD architecture, combining macrocells intofunction blocks interconnected with a global routing matrix, the Xilinx AdvancedInterconnect Matrix (AIM). The function blo ...
可编程逻辑 XAPP708 -133MHz PCI-X到128MB DDR小型DIMM存储器桥
 
The Virtex-4 features, such as the programmable IDELAY and built-in FIFO support, simplifythe bridging of a high-speed, PCI-X core to large amounts of DDR-SDRAM memory. Onechallenge is meeting the PCI-X target initial latency specification. PCI-X Protocol Addendum tothe PCI Local Bus Spec ...
可编程逻辑 基于Xilinx FPGA的双输出DC/DC转换器解决方案
 
Xilinx FPGAs require at least two power supplies: VCCINTfor core circuitry and VCCO for I/O interface. For the latestXilinx FPGAs, including Virtex-II Pro, Virtex-II and Spartan-3, a third auxiliary supply, VCCAUX may be needed. Inmost cases, VCCAUX can share a power supply with VCCO.The ...
可编程逻辑 WP312-Xilinx新一代28nm FPGA技术简介
Xilinx Next Generation 28 nm FPGA Technology Overview
Xilinx has chosen 28 nm high-κ metal gate (HKMG) highperformance,low-power process technology and combined it with a new unified ASMBL™ architecture to create a new generation of FPGAs that offer lower power and higher performance. ...