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ARM LPC1300系列产品勘误数据手册
On the LPC13xx, programming, erasure and re-programming of the on-chip flash can be performed using In-System Programming (ISP) via the UART serial port, and also, can be performed using In-Application Programming (IAP) calls directed by the end-user code. For In-System Programming (ISP) via the UAR ...
可编程逻辑 US Navy VHDL Modelling Guide
 
This document was developed under the Standard Hardware and Reliability Program (SHARP) TechnologyIndependent Representation of Electronic Products (TIREP) project. It is intended for use by VHSIC HardwareDescription Language (VHDL) design engineers and is offered as guidance for the deve ...
可编程逻辑 基于Verilog HDL设计的多功能数字钟
本文利用Verilog HDL 语言自顶向下的设计方法设计多功能数字钟，突出了其作为硬件描述语言的良好的可读性、可移植性和易理解等优点，并通过Altera QuartusⅡ 4.1 和ModelSim SE 6.0 完成综合、仿真。此程序通过下载到FPGA 芯片后，可应用于实际的数字钟显示中。
关键词：Verilog HDL；硬件描述语言；FPGA
Abstract: In this ...
测试测量 高精度温度测量铂电阻温度探测器(PRTDs)和ADC
Abstract: Many modern industrial, medical, and commercial applications require temperature measurements in the extended temperature rangewith accuracies of ±0.3°C or better, performed with reasonable cost and often with low power consumption. This article explains how platinumresistance ...
人工智能/神经网络 This applet illustrates the prediction capabilities of the multi-layer perceptrons. It allows to def
This applet illustrates the prediction capabilities of the multi-layer perceptrons. It allows to define an input signal on which prediction will be performed. The user can choose the number of input units, hidden units and output units, as well as the delay between the input series and the predicted ...
Delphi控件源码 This PNG Delphi version 1.56 documentation (this version is a major rewrite intended to replace the
This PNG Delphi version 1.56 documentation (this version is a major rewrite intended to replace the previous version, 1.2).
Improvements in this new version includes:
This new version allows the programmer to not use Delphi heavy units which will greatly reduce the size of the final executable.
R ...
Linux/Unix编程 Simulation of RM(1,3), equivalent to the (8,4,4) extended Hamming code. Soft-decision decoding perf
Simulation of RM(1,3), equivalent to the (8,4,4) extended Hamming code.
Soft-decision decoding performed by the Green machine
其他书籍 关于FPGA流水线设计的论文 This work investigates the use of very deep pipelines for implementing circuits in
关于FPGA流水线设计的论文
This work investigates the use of very deep pipelines for
implementing circuits in FPGAs, where each pipeline
stage is limited to a single FPGA logic element (LE). The
architecture and VHDL design of a parameterized integer
array multiplier is presented and also an IEEE 754
...
编译器/解释器 C-Talk is interpreted scripting language with C-like syntax and dynamic type checking. Variables in
C-Talk is interpreted scripting language with C-like syntax and dynamic type checking. Variables in C-Talk have no type. So there is no compile time type checking in C-Talk, all checking is performed at runtime. To preserve reference integrity, explicit memory deallocation is prohibited in C-Talk, u ...
matlab例程 This code was used for making the practical measurements in section 2.3 of my thesis. This Matlab co
This code was used for making the practical measurements in section 2.3 of my thesis. This Matlab code allows an OFDM signal to be generated based on an input data file. The data can be random data, a grey scale image, a wave file, or any type of file. The generated OFDM signal is stored as a window ...