搜索：parallel+structure
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https://www.eeworm.com/dl/648/399203.html
单片机开发
This course is about "distributed algorithms".Distributed algorithms include a wide range of paralle
This course is about "distributed algorithms".Distributed algorithms include a wide range of parallel algorithms,which can be classified by a variety of attributes.
https://www.eeworm.com/dl/648/362886.html
单片机开发
The "1818" is my first search word in this website, So I upload Lcd drive(Ssd1818a) C language code
The "1818" is my first search word in this website, So I upload Lcd drive(Ssd1818a) C language code as my support.
96*64 dot matrix Graphic
LCD controller: SSD1818A
Parallel interface
Initial routine code
Command write and Data write
Base functions and application code
Asci ...
https://www.eeworm.com/dl/951771.html
技术资料
74LS16.pdf
英文描述： PARALLEL-LOAD 8-BIT SHIFT REGISTERS
中文描述： 并行-载重8位转换寄存器
https://www.eeworm.com/dl/951818.html
技术资料
74LS166.pdf
英文描述： PARALLEL-LOAD 8-BIT SHIFT REGISTERS
中文描述： 并行-载重8位转换寄存器
https://www.eeworm.com/dl/534/487877.html
其他
sba, a C/C++ package for generic sparse bundle adjustment is almost invariably used as the last step
sba, a C/C++ package for generic sparse bundle adjustment is almost invariably used as the last step of every feature-based multiple view reconstruction vision algorithm to obtain optimal 3D structure and motion (i.e. camera matrix) parameter estimates. Provided with initial esti ...
https://www.eeworm.com/dl/911865.html
技术资料
BingkouCaozhuo
一个并口通信程序，可以分别设置并口的各个位的状态-A parallel port communication program
https://www.eeworm.com/dl/665/319681.html
matlab例程
Capacity of a MIMO channel with nt transmit antenna and nr recieve antenna is analyzed. The power in
Capacity of a MIMO channel with nt transmit antenna and nr recieve antenna is analyzed. The power in parallel channel (after decomposition) is distributed as water-filling algorithm
https://www.eeworm.com/dl/643/292275.html
USB编程
his paper discuss how to design data acquisition and process system based on USB Transmitting. We
his paper discuss how to design data acquisition and process system based
on USB Transmitting. We further introduce some system’s structure such as Operation
https://www.eeworm.com/dl/663/399122.html
VHDL/FPGA/Verilog
是codic算法实现atan的virilog程序
是codic算法实现atan的virilog程序，模块结构如下：Core Structure: sc_corproc.vhd->p2r_cordic.vhd->p2r_cordicpipe.vhd
https://www.eeworm.com/dl/541/15583.html
资料/手册
74LS165.pdf
英文描述： 8-Bit Parallel In/Serial Output Shift Registers
中文描述： 8位并行/串行输出移位寄存器