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可编程逻辑  Xilinx UltraScale：新一代架构满足您的新一代架构需求（EN）

　　中文版详情浏览：http://www.elecfans.com/emb/fpga/20130715324029.html 　　Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture 　　The Xilinx&reg; UltraScale&trade; architecture delivers unprecedented levels of integration and capability with ASIC-class ...

https://www.eeworm.com/dl/kbcluoji/38746.html

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可编程逻辑  PCB Design Considerations and Guidelines for 0.4mm and 0.5mm WLPs

Abstract: Using a wafer-level package (WLP) can reduce the overall size and cost of your solution.However when using a WLP IC, the printed circuit board (PCB) layout can become more complex and, ifnot carefully planned, result in an unreliable design. This article presents some PCB designconsidera ...

https://www.eeworm.com/dl/kbcluoji/38883.html

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可编程逻辑  采用TÜV认证的FPGA开发功能安全系统

This white paper discusses how market trends, the need for increased productivity, and new legislation have accelerated the use of safety systems in industrial machinery. This T&Uuml;V-qualified FPGA design methodology is changing the paradigms of safety designs and will greatly reduce development e ...

https://www.eeworm.com/dl/kbcluoji/39304.html

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可编程逻辑  Analog Solutions for Altera FPGAs

Designing withProgrammable Logicin an Analog WorldProgrammable logic devices revolutionizeddigital design over 25 years ago,promising designers a blank chip todesign literally any function and programit in the field. PLDs can be low-logicdensity devices that use nonvolatilesea-of-gates cells calle ...

https://www.eeworm.com/dl/kbcluoji/39953.html

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可编程逻辑  Analog Solutions for Xilinx FPGAs

Designing withProgrammable Logicin an Analog WorldProgrammable logic devicesrevolutionized digital design over 25years ago, promising designers a blankchip to design literally any functionand program it in the field. PLDs canbe low-logic density devices that usenonvolatile sea-of-gates cells calle ...

https://www.eeworm.com/dl/kbcluoji/39954.html

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可编程逻辑  XAPP452-Spartan-3高级配置架构

This application note provides a detailed description of the Spartan&trade;-3 configurationarchitecture. It explains the composition of the bitstream file and how this bitstream isinterpreted by the configuration logic to program the part. Additionally, a methodology ispresented that will guide th ...

https://www.eeworm.com/dl/kbcluoji/40052.html

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可编程逻辑  XAPP444 - CPLD配件,技巧和窍门

Most designers wish to utilize as much of a device as possible in order to enhance the overallproduct performance, or extend a feature set. As a design grows, inevitably it will exceed thearchitectural limitations of the device. Exactly why a design does not fit can sometimes bedifficult to determ ...

https://www.eeworm.com/dl/kbcluoji/40063.html

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可编程逻辑  XAPP440 - Xilinx CPLD的上电性能

Applying power to a standard logic chip, SRAM, or EPROM, usually results in output pinstracking the applied voltage as it rises. Programmable logic attempts to emulate that behavior,but physics forbids perfect emulation, due to the device programmability. It requires care tospecify the pin behavio ...

https://www.eeworm.com/dl/kbcluoji/40065.html

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可编程逻辑  Virtex-6 FPGA PCB设计手册

Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the developmentof designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit theDocumentation in ...

https://www.eeworm.com/dl/kbcluoji/40076.html

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可编程逻辑  XAPP806 -决定DDR反馈时钟的最佳DCM相移

This application note describes how to build a system that can be used for determining theoptimal phase shift for a Double Data Rate (DDR) memory feedback clock. In this system, theDDR memory is controlled by a controller that attaches to either the OPB or PLB and is used inan embedded microproces ...

https://www.eeworm.com/dl/kbcluoji/40078.html

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