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        Verilog_HDL的基本语法详解（夏宇闻版）:Verilog HDL是一种用于数字逻辑电路设计的语言。用Verilog HDL描述的电路设计就是该电路的Verilog HDL模型。Verilog HDL既是一种行为描述的语言也是一种结构描述的语言。这也就是说，既可以用电路的功能描述也可以用元器件和它们之 ...

Today’s digital systems combine a myriad of chips with different voltage configurations.Designers must interface 2.5V processors with 3.3V memories—both RAM and ROM—as wellas 5V buses and multiple peripheral chips. Each chip has specific power supply needs. CPLDsare ideal for han ...

The LogiCORE™ GTP Wizard automates the task of creating HDL wrappers to configure the high-speed serial GTP transceivers in Virtex™-5 LXT and SXT devices. The menu-driven interface allows one or more GTP transceivers to be configured using pre-definedtemplates for popular industry standa ...

  The data plane of the reference design consists of a configurable multi-channel XBERT modulethat generates and checks high-speed serial data transmitted and received by the MGTs. Eachchannel in the XBERT module consists of two MGTs (MGTA and MGTB), which physicallyoccupy one MGT tile in t ...

ARM通讯 　　H-JTAG 是一款简单易用的的调试代理软件，功能和流行的MULTI-ICE 类似。H-JTAG 包括两个工具软件：H-JTAG SERVER 和H-FLASHER。其中，H-JTAG SERVER 实现调试代理的功能，而H-FLASHER则实现了FLASH 烧写的功能。H-JTAG 的基本结构如下图1-1所示。　　H-JTAG支持所有基于ARM7 和ARM9的芯片的调试，并且支持大 ...

XMail is an Internet and intranet mail server featuring an SMTP server, POP3 server, finger server, multiple domains, no need for users to have a real system account, SMTP relay checking, RBL/RSS/ORBS/DUL and custom ( IP based and address based ) spam protection, SMTP authentication ( PLAIN LOGIN CR ...

来自《VC6.0可视化编程》的源码，适用于初学者。 这是第一章，关于multi windows 的代码

linux下的gdbserver源码，供multi-ice调试ARM处理器

The practice of enterprise application development has benefited from the emergence of many new enabling technologies. Multi-tiered object-oriented platforms, such as Java and .NET, have become commonplace.

这是一个测试Timer类用法的程序.程序会随机产生10个时间， 并在时间到的时候出发Task类对象中的run方法