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Linux/Unix编程 dvbsnoop is a DVB/MPEG stream analyzer program. The program can be used to sniff, monitor, debug, d
dvbsnoop is a DVB/MPEG stream analyzer program.
The program can be used to sniff, monitor, debug, dump
or view DVB/MPEG/DSM-CC/MHP stream information (digital
television or data broadcasts) sent via satellite, cable
or terrestrial.
系统设计方案 This application report introduces and describes an MP3 /AAC audio player for use with the TMS320C54
This application report introduces and describes an MP3 /AAC audio player for use with the TMS320C54x(TM) digital signal processor (DSP) devices. This audio player is based on Reference Framework Level 3 (RF3). Reference Framework for eXpressDSP(TM) Software is a start-ware for developing applicatio ...
人工智能/神经网络 人工智能中模糊逻辑算法 FuzzyLib 2.0 is a comprehensive C++ Fuzzy Logic library for constructing fuzzy logic sy
人工智能中模糊逻辑算法
FuzzyLib 2.0 is a comprehensive C++ Fuzzy Logic library for constructing fuzzy logic systems with multi-controller support.
It supports all commonly used shape functions and hedges, with full support for the various types of Aggregation, Correlation, Alphacut, Composition, De ...
嵌入式/单片机编程 Welcome to PMOS. PMOS is a set of modules, mostly written in Modula-2, to support multitasking. PMO
Welcome to PMOS. PMOS is a set of modules, mostly written in Modula-2,
to support multitasking. PMOS was designed primarily with real-time
applications in mind. It is not an operating system in the conventional
sense rather, it is a collection of modules which you can import
into your own programs, ...
单片机开发 一个Jtag调试仿真程序
一个Jtag调试仿真程序,兼容Multi-ICE,这是源代码,很难找到的。特别推荐
数据结构 R+树的c实现源码
R+树的c实现源码,对应文章T. K. Sellis, N. Roussopoulos, C. Faloutsos: The R+-Tree: A Dynamic Index for Multi-Dimensional Objects.
其他 硬件设计指南(PDF格式)
硬件设计指南(PDF格式),主要包括:Low Voltage Interfaces;Grounding in Mixed Signal Systems;Digital Isolation Techniques; Power Supply Noise Reduction and Filtering; Dealing with High Speed Logic
其他书籍 Verilog and VHDL状态机设计
Verilog and VHDL状态机设计,英文pdf格式
State machine design techniques for Verilog and VHDL
Abstract : Designing a synchronous finite state Another way of organizing a state machine (FSM) is a common task for a digital logic only one logic block as shown in
engineer. This paper will discuss a var ...
行业发展研究 I believe that technology has the capacity to fundamentally improve people’s lives, and improve the
I believe that technology has the capacity to fundamentally improve people’s lives, and
improve the world in which we live.We are now two years into what my company have
called the ‘Digital Decade’.We think that by 2010 a combination of hardware and software
innovation with broader social trends ...
matlab例程 The function conload takes a dataset and a model (PCA, PLS, PARAFAC etc.) and calculates congruence
The function conload takes a dataset and a model (PCA, PLS, PARAFAC etc.) and calculates congruence loadings which is the extension of correlation loadings to uncentered and multi-way models