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ARM LPC4300系列ARM双核微控制器产品数据手册
The LPC4350/30/20/10 are ARM Cortex-M4 based microcontrollers for embeddedapplications. The ARM Cortex-M4 is a next generation core that offers systemenhancements such as low power consumption, enhanced debug features, and a highlevel of support block integration.The LPC4350/30/20/10 operate at CPU ...
可编程逻辑 基于FPGA的光纤光栅解调系统的研究
 波长信号的解调是实现光纤光栅传感网络的关键，基于现有的光纤光栅传感器解调方法，提出一种基于FPGA的双匹配光纤光栅解调方法，此系统是一种高速率、高精度、低成本的解调系统，并且通过引入双匹配光栅有效地克服了双值问题同时扩大了检测范围。分析了光纤光栅的测温原理并给出了该方案软硬件设计，综合考虑系统的解 ...
语音压缩 16kb/s Low Delay CELP 算法
16kb/s Low Delay CELP 算法
嵌入式/单片机编程 Low End Microchip PICs C函数
Low End Microchip PICs C函数
文章/文档 int trace (int i, int j, int low, IMAGE im,IMAGE mag, IMAGE ori) float gauss(float x, float sigma) f
int trace (int i, int j, int low, IMAGE im,IMAGE mag, IMAGE ori) float gauss(float x, float sigma) float dGauss (float x, float sigma) float meanGauss (float x, float sigma) void hysteresis (int high, int low, IMAGE im, IMAGE mag, IMAGE oriim) void canny (float s, IMAGE im, IMAGE mag, IMAGE ori)
文章/文档 Packet Capture with Libpcap and other Low Level Network Tricks.rar
Packet Capture with Libpcap and other Low Level Network Tricks.rar
文件格式 H.263 文档 DRAFT ITU-T Recommendation H.263 VIDEO CODING FOR LOW BITRATE COMMUNICATION
H.263 文档 DRAFT ITU-T Recommendation H.263 VIDEO CODING FOR LOW BITRATE COMMUNICATION
Delphi控件源码 FlexCompress is a high-speed compression library developed to provide archive functionality for your
FlexCompress is a high-speed compression library developed to provide archive functionality for your applications. This solution provides flexible compression and strong encryption algorithms that allows you to integrate archiving or backup features into your programs in a fast and easy way.
其他书籍 Multicode High-Speed Transmission for Wireless Mobile Communications
Multicode High-Speed Transmission for Wireless Mobile Communications
VHDL/FPGA/Verilog pic cpu source code. it is writed in the verilog source code. it can work on the 40Mhz high speed.
pic cpu source code. it is writed in the verilog source code. it can work on the 40Mhz high speed.