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The RT9005A/B is a dual-output Linear regulator for DDR-SDRAM VDDQ supply and termination voltage VTT supply.

The RT9018A/B is a high performance positive voltage regulator designed for use in applications requining very low Input voltage and very low dropout voltage at up to 3A(peak).

　　本软件是关于MAX338, MAX339的英文数据手册：MAX338, MAX339   8通道/双4通道、低泄漏、CMOS模拟多路复用器 　　The MAX338/MAX339 are monolithic, CMOS analog multiplexers (muxes). The 8-channel MAX338 is designed to connect one of eight inputs to a common output by control of a 3-bit binar ...

This example provides a description of how  to use the USART with hardware flowcontrol and communicate with the Hyperterminal.First, the USART2 sends the TxBuffer to the hyperterminal and still waiting fora string from the hyperterminal that you must enter which must end by '\r'character (keypa ...

温湿度传感器 sht11 仿真程序 sbit out =P3^0; //加热口  //sbit input =P1^1;//检测口  //sbit speek =P2^0;//报警  sbit clo =P3^7;//时钟  sbit ST =P3^5;//开始  sbit EOC =P3^6;//成功信号  sbit gwei =P3^4;//个位  sbit&nb ...

注:1.这篇文章断断续续写了很久,画图技术也不精,难免错漏,大家凑合看.有问题可以留言.      2.论坛排版把我的代码缩进全弄没了,大家将代码粘贴到arduino编译器,然后按ctrl+T重新格式化代码格式即可看的舒服. 一、什么是PWM PWM 即Pulse Wavelength Modulation 脉宽调制波，通过调整输出信号占空 ...

protel 99se 使用技巧以及常见问题解决方法：里面有一些protel 99se 特别技巧，还有我们经常遇到的一些问题！如何使一条走线至两个不同位置零件的距离相同? 您可先在Design/Rule/High Speed/Matched Net Lengths的规则中来新增规则设定,最后再用Tools/EqualizeNet Lengths 来等长化即可。 Q02、在SCHLIB中造一零件其PIN的 ...

Applying power to a standard logic chip, SRAM, or EPROM, usually results in output pinstracking the applied voltage as it rises. Programmable logic attempts to emulate that behavior,but physics forbids perfect emulation, due to the device programmability. It requires care tospecify the pin behavio ...

This application note describes how to build a system that can be used for determining theoptimal phase shift for a Double Data Rate (DDR) memory feedback clock. In this system, theDDR memory is controlled by a controller that attaches to either the OPB or PLB and is used inan embedded microproces ...

This application note covers the design considerations of a system using the performance features of the LogiCORE™ IP Advanced eXtensible Interface (AXI) Interconnect core. The design focuses on high system throughput through the AXI Interconnect core with F MAX  and area optimizat ...