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The TRS232E is a dual driver/receiver that includes a capacitive voltage generator to supply TIA/RS-232-Fvoltage levels from a single 5-V supply. Each receiver converts TIA/RS-232-F inputs to 5-V TTL/CMOS levels.This receiver has a typical threshold of 1.3 V, a typical hysteresis of 0.5 V, and can a ...

The main oscillator allows either a crystal or single-ended input clock signal. Cost-sensitiveapplications typically use an external crystal with the on-chip oscillator circuit since it is the mostcost-effective solution. It is also possible to use the internal oscillator to clock the device after t ...

The MAX3243E device consists of three line drivers, five line receivers, and a dual charge-pump circuit with±15-kV ESD (HBM and IEC61000-4-2, Air-Gap Discharge) and ±8-kV ESD (IEC61000-4-2, Contact Discharge)protection on serial-port connection pins. The device meets the requirements of TIA/EIA-23 ...

基于PIC单片机的脉冲电源:设计了一种金属凝固过程用脉冲电源。该电源采用PIC16F877作为主控芯片，实现对窄脉冲电流幅值的检测，以及时电流脉冲幅值根据模糊PID算法进行闲环控制。使用结果表明：该电源的输出脉冲波形良好，电流幅值稳定，满足合金材料凝固过程的工艺要求且运行稳定可靠。关键词：脉冲电源；PIC16F877单片机 ...

高压双管反激变换器的设计:介绍一种双管反激的电路拓扑，分析了其工作原理，给出了一些关键技术参数的计算公式，设计并研制成功的30W 380V AC5 0H z/510V DC/+15.1 V DC(1A )、+5.2VDC(2A)辅助开关电源具有功率密度高、变换效率高、可靠性高等优良的综合性能。该变换器在高电压输人情况下有重要的应用价值。【关 键 词 】变 ...

Internal Interrupts are used to respond to asynchronous requests from a certain part of themicrocontroller that needs to be serviced. Each peripheral in the TriCore as well as theBus Control Unit, the Debug Unit, the Peripheral Control Processor (PCP) and the CPUitself can generate an Interrupt Requ ...

The Infineon TriCore provides an Interrupt System with a high safety standard. Thisdocument contains some instructions on how to initiate an Interrupt from an externaldevice. First it will show you how to trigger an Interrupt Service Request by an impulseon Port 0 or Port 1. Then in the second part ...

All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, howeve ...

This application note describes how to build a system that can be used for determining theoptimal phase shift for a Double Data Rate (DDR) memory feedback clock. In this system, theDDR memory is controlled by a controller that attaches to either the OPB or PLB and is used inan embedded microproces ...

This application note covers the design considerations of a system using the performance features of the LogiCORE™ IP Advanced eXtensible Interface (AXI) Interconnect core. The design focuses on high system throughput through the AXI Interconnect core with F MAX  and area optimizat ...