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汇编语言 1、 在NMBER INPUT的基础上设计数字密码锁 2、 运行初始密码为学号后8位
1、 在NMBER INPUT的基础上设计数字密码锁
2、 运行初始密码为学号后8位,密码不正确执行4、5功能
3、 连续3次密码错误,锁定键盘,发出报警指示
4、 输出开锁信号(使用功率开关),LED指示
设置修改密码功能,数据存入24C01EEROM ...
JavaScript Calculates if the brackets in a sentence are correctly close. Input consists, one per line, sentenc
Calculates if the brackets in a sentence are correctly close.
Input consists, one per line, sentences with brackets, and output say YES if its correctly close, or NO int if its not saying where is the error.
Input:
()[]<>(**)
(*)
(ASA
Output:
YES
NO 2
NO 4
JavaScript Implementation of Edmonds Karp algorithm that calculates maxFlow of graph. Input: For each test c
Implementation of Edmonds Karp algorithm that calculates maxFlow of graph.
Input:
For each test case, the first line contains the number of vertices (n) and the number of arcs (m). Then, there exist m lines, one for each arc (source vertex, ending vertex and arc weight, separated by a space). The n ...
其他嵌入式/单片机内容 sd card input,output source program
sd card input,output source program
软件设计/软件工程 If you need a simple program to time onscreen events this is it. Just click the window and it will
If you need a simple program to time onscreen events
this is it. Just click the window and it will start timing. Click again
and it will stop.
Java编程 read file input (java source code)
read file input (java source code)
嵌入式/单片机编程 7400 QUAD 2-INPUT NAND GATES 与非门 7401 QUAD 2-INPUT NAND GATES OC 与非门 7402 QUAD 2-INPUT NOR GATES
7400 QUAD 2-INPUT NAND GATES 与非门
7401 QUAD 2-INPUT NAND GATES OC 与非门
7402 QUAD 2-INPUT NOR GATES 或非门
7403 QUAD 2-INPUT NAND GATES 与非门
7404 HEX INVERTING GATES 反向器
7406 HEX INVERTING GATES HV 高输出反向器
7408 QUAD 2-INPUT AND GATE 与门
7409 QUAD 2-INPUT AND GATES OC 与门
7410 ...
matlab例程 Smart Antenna system receiving three white input multipath signals from two sources (3 each) and dis
Smart Antenna system receiving three white input multipath signals from two sources (3 each) and distinguishing each multipath.
编译器/解释器 This circuit is a nice edge detector that gives you synchronous notification of edges on your input
This circuit is a nice edge detector that gives you
synchronous notification of edges on your input signal. There s no excuse for not doing this it s a tiny
circuit in just five lines of Verilog.
数值算法/人工智能 These codes require an ASCII input file called input.dat of the following form: Lower Limit on x
These codes require an ASCII input file called input.dat of the following form:
Lower Limit on x Upper Limit on x Final Time
Pressure for x<0 when t=0 Density for x<0 when t=0 Speed for x<0 when t=0
Pressure for x>0 when t=0 Density for x>0 when t=0 Speed for x>0 when t=0
These codes ...