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可编程逻辑 Nios II软件开发人员手册中的缓存和紧耦合存储器部分

        Nios II 软件开发人员手册中的缓存和紧耦合存储器部分 Nios® II embedded processor cores can contain instruction and data caches. This chapter discusses cache-related issues that you need to consider to guarantee that your program executes correctly on the ...
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可编程逻辑 Nios II定制指令用户指南

     Nios II定制指令用户指南:With the Altera Nios II embedded processor, you as the system designer can accelerate time-critical software algorithms by adding custom instructions to the Nios II processor instruction set. Using custom instructions, you can reduce a complex sequen ...
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uCOS 介绍几种cpuThe 8xC251SA/SB/SP/SQ improves on the MCS-51 architecture and peripheral features, introducin

介绍几种cpuThe 8xC251SA/SB/SP/SQ improves on the MCS-51 architecture and peripheral features, introducing the advanced register based CPU architecture i.e., the MCS 251 microcontroller architecture. The register based CPU supports a 40-byte register file. In addition, the 8xC251SA/SB/SP/SQ microcont ...
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编译器/解释器 Here are some short instructions for use of mod-xslt. The stylesheet is specified using the Proce

Here are some short instructions for use of mod-xslt. The stylesheet is specified using the Processing Instruction <?xml-stylesheet type="text/xsl" href="URL-OF-YOUR-STYLESHEET"?> or now new <?xslt-stylesheet agent="THE-USER-AGENT-STRING-OF-THE-BROWSER" href="URL-OF-YOUR-STYLESHEET"?> This now ...
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其他书籍 The ability to write efficient, high-speed arithmetic routines ultimately depends upon your knowled

The ability to write efficient, high-speed arithmetic routines ultimately depends upon your knowledge of the elements of arithmetic as they exist on a computer. That conclusion and this book are the result of a long and frustrating search for information on writing arithmetic routines for real-time ...
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软件工程 ARMask.The ARM has six operating modes: &#8226 User (unprivileged mode under which most tasks run)

ARMask.The ARM has six operating modes: &#8226 User (unprivileged mode under which most tasks run) &#8226 FIQ (entered when a high priority (fast) interrupt is raised) &#8226 IRQ (entered when a low priority (normal) interrupt is raised) &#8226 Supervisor (entered on reset and when a Software Interr ...
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其他书籍 The TMS320C64x&#8482 DSPs (including the TMS320DM642 device) are the highest-performance fixed-point

The TMS320C64x&#8482 DSPs (including the TMS320DM642 device) are the highest-performance fixed-point DSP generation in the TMS320C6000&#8482 DSP platform. The TMS320DM642 (DM642) device is based on the second-generation high-performance, advanced VelociTI&#8482 very-long-instruction-word (VLIW) arch ...
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单片机开发 /*SPI规范:Data is always clocked into the device on the rising edge of SCK a-*/ /* nd clocked out of

/*SPI规范:Data is always clocked into the device on the rising edge of SCK a-*/ /* nd clocked out of the device on the falling edge of SCK.All instruction-*/ /* s,addresses and data are transferred with the most significant bit(MSB) */ /* first.
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系统设计方案 this a 8-bit risc micro process,Th eM C Ud esignedis c ompatiblew ith PIC16C57 o microchip Technolog

this a 8-bit risc micro process,Th eM C Ud esignedis c ompatiblew ith PIC16C57 o microchip Technology Inc.in the instruction system
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通讯编程文档 The SST89E516RDx and SST89V516RDx are members of the FlashFlex51 family of 8-bit microcontroller pr

The SST89E516RDx and SST89V516RDx are members of the FlashFlex51 family of 8-bit microcontroller products designed and manufactured with SST’s patented and proprietary SuperFlash CMOS semiconductor process technology. The split-gate cell design and thick-oxide tunneling injector offer significant c ...
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