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ARM LPC4300系列ARM双核微控制器产品数据手册
The LPC4350/30/20/10 are ARM Cortex-M4 based microcontrollers for embeddedapplications. The ARM Cortex-M4 is a next generation core that offers systemenhancements such as low power consumption, enhanced debug features, and a highlevel of support block integration.The LPC4350/30/20/10 operate at CPU ...
ARM LPC1300系列产品勘误数据手册
On the LPC13xx, programming, erasure and re-programming of the on-chip flash can be performed using In-System Programming (ISP) via the UART serial port, and also, can be performed using In-Application Programming (IAP) calls directed by the end-user code. For In-System Programming (ISP) via the UAR ...
技术书籍 时钟恢复设计_英文版
Today in many applications such as network switches, routers, multi-computers,and processor-memory interfaces, the ability to integrate hundreds of multi-gigabit I/Os is desired to make better use of the rapidly advancing IC technology.
开发工具 MAXQUSBJTAGOW评估板软件
MAXQUSBJTAGOW评估板软件:关键特性 Easily Load and Debug Code Interface Provides In-Application Debugging Features Step-by-Step Execution Tracing Breakpointing by Code Address, Data Memory Address, or Register Access Data Memory View and Edit Supports Logic Levels from 1.1V to 3.6V Supports JTAG and 1 ...
实用工具 MAXQUSBJTAGOW评估板软件
MAXQUSBJTAGOW评估板软件:关键特性 Easily Load and Debug Code Interface Provides In-Application Debugging Features Step-by-Step Execution Tracing Breakpointing by Code Address, Data Memory Address, or Register Access Data Memory View and Edit Supports Logic Levels from 1.1V to 3.6V Supports JTAG and 1 ...
可编程逻辑 怎样使用Nios II处理器来构建多处理器系统
怎样使用Nios II处理器来构建多处理器系统
Chapter 1. Creating Multiprocessor Nios II Systems
Introduction to Nios II Multiprocessor Systems . . . . . . . . . . . . . . 1–1
Benefits of Hierarchical Multiprocessor Systems  . . . . . . . . . . . . . . . 1–2
Nios II Multiprocessor System ...
可编程逻辑 使用Nios II紧耦合存储器教程
             使用Nios II紧耦合存储器教程
Chapter 1. Using Tightly Coupled Memory with the Nios II Processor
Reasons for Using Tightly Coupled Memory  . . . . . . . . . . . . . . . . . . . . . . . 1–1
Tradeoffs  . . . . . . . ...
可编程逻辑 Employing a Single-Chip Transceiver in Femtocell Base-Station Applications
Abstract: This application note discusses the development and deployment of 3G cellular femtocell base stations. The technicalchallenges for last-mile residential connectivity and adding system capacity in dense urban environments are discussed, with 3Gfemtocell base stations as a cost-effective s ...
可编程逻辑 XAPP098 - Spartan FPGA低成本、高效率串行配置
This application note shows how to achieve low-cost, efficient serial configuration for Spartan FPGA designs. The approachrecommended here takes advantage of unused resources in a design, thereby reducing the cost, part count, memory size,and board space associated with the serial configuration ci ...
可编程逻辑 XAPP806 -决定DDR反馈时钟的最佳DCM相移
This application note describes how to build a system that can be used for determining theoptimal phase shift for a Double Data Rate (DDR) memory feedback clock. In this system, theDDR memory is controlled by a controller that attaches to either the OPB or PLB and is used inan embedded microproces ...