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可编程逻辑 XAPP953-二维列序滤波器的实现
 
This application note describes the implementation of a two-dimensional Rank Order filter. Thereference design includes the RTL VHDL implementation of an efficient sorting algorithm. Thedesign is parameterizable for input/output precision, color standards, filter kernel size,maximum horiz ...
可编程逻辑 XAPP1065 - 利用Spartan-6 FPGA设计扩频时钟发生器
 
Consumer display applications commonly use high-speed LVDS interfaces to transfer videodata. Spread-spectrum clocking can be used to address electromagnetic compatibility (EMC)issues within these consumer devices. This application note uses Spartan®-6 FPGAs togenerate spread-spectrum ...
可编程逻辑 XAPP708 -133MHz PCI-X到128MB DDR小型DIMM存储器桥
 
The Virtex-4 features, such as the programmable IDELAY and built-in FIFO support, simplifythe bridging of a high-speed, PCI-X core to large amounts of DDR-SDRAM memory. Onechallenge is meeting the PCI-X target initial latency specification. PCI-X Protocol Addendum tothe PCI Local Bus Spec ...
可编程逻辑 WP328-FPGA的语音数据融合
 
The SDI standards are the predominant standards for uncompressed digital videointerfaces in the broadcast studio and video production center. The first SDI standard,SD-SDI, allowed standard-definition digital video to be transported over the coaxial cableinfrastructure initially instal ...
可编程逻辑 XAPP740利用AXI互联设计高性能视频系统
This application note covers the design considerations of a system using the performance
features of the LogiCORE™ IP Advanced eXtensible Interface (AXI) Interconnect core. The
design focuses on high system throughput through the AXI Interconnect core with F
MAX
 and
area optimizat ...
可编程逻辑 XAPP520将符合2.5V和3.3V I/O标准的7系列FPGA高性能I/O Bank进行连接
XAPP520将符合2.5V和3.3V I/O标准的7系列FPGA高性能I/O Bank进行连接 
The I/Os in Xilinx® 7 series FPGAs are classified as either high range (HR) or high performance (HP) banks. HR I/O banks can be operated from 1.2V to 3.3V, whereas HP I/O banks are optimized for operation between 1.2V and ...
可编程逻辑 WP409利用Xilinx FPGA打造出高端比特精度和周期精度浮点DSP算法实现方案
WP409利用Xilinx FPGA打造出高端比特精度和周期精度浮点DSP算法实现方案:
High-Level Implementation of Bit- and Cycle-Accurate Floating-Point DSP Algorithms with Xilinx FPGAs
可编程逻辑 WP312-Xilinx新一代28nm FPGA技术简介
Xilinx Next Generation 28 nm FPGA Technology Overview
Xilinx has chosen 28 nm high-κ metal gate (HKMG) highperformance,low-power process technology and combined it with a new unified ASMBL™ architecture to create a new generation of FPGAs that offer lower power and higher performance. ...
可编程逻辑 FPGA设计重利用方法(Design Reuse Methodology)
 
FPGAs have changed dramatically since Xilinx first introduced them just 15 years ago. In thepast, FPGA were primarily used for prototyping and lower volume applications; custom ASICswere used for high volume, cost sensitive designs. FPGAs had also been too expensive and tooslow for many a ...
可编程逻辑 基于FPGA的光纤光栅解调系统的研究
 波长信号的解调是实现光纤光栅传感网络的关键,基于现有的光纤光栅传感器解调方法,提出一种基于FPGA的双匹配光纤光栅解调方法,此系统是一种高速率、高精度、低成本的解调系统,并且通过引入双匹配光栅有效地克服了双值问题同时扩大了检测范围。分析了光纤光栅的测温原理并给出了该方案软硬件设计,综合考虑系统的解 ...