搜索：hardware - 虫虫下载站

可编程逻辑  Nios II定制指令用户指南

&nbsp;&nbsp;&nbsp;&nbsp; Nios II定制指令用户指南：With the Altera Nios II embedded processor, you as the system designer can accelerate time-critical software algorithms by adding custom instructions to the Nios II processor instruction set. Using custom instructions, you can reduce a complex sequen ...

https://www.eeworm.com/dl/kbcluoji/39394.html

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可编程逻辑  Nios II 系列处理器配置选项

&nbsp;&nbsp;&nbsp; Nios II 系列处理器配置选项:This chapter describes the Nios&reg; II Processor parameter editor in Qsys and SOPC Builder. The Nios II Processor parameter editor allows you to specify the processor features for a particular Nios II hardware system. This chapter covers the features of ...

https://www.eeworm.com/dl/kbcluoji/39396.html

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可编程逻辑  Virtex-6 FPGA PCB设计手册

Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the developmentof designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit theDocumentation in ...

https://www.eeworm.com/dl/kbcluoji/40076.html

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可编程逻辑  xilinx Zynq-7000 EPP产品简介

The Xilinx Zynq-7000 Extensible Processing Platform (EPP) redefines the possibilities for embedded systems, giving system and software architects and developers a flexible platform to launch their new solutions and traditional ASIC and ASSP users an alternative that aligns with today&rsquo;s progr ...

https://www.eeworm.com/dl/kbcluoji/40119.html

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可编程逻辑  US Navy VHDL Modelling Guide

&nbsp; This document was developed under the Standard Hardware and Reliability Program (SHARP) TechnologyIndependent Representation of Electronic Products (TIREP) project. It is intended for use by VHSIC HardwareDescription Language (VHDL) design engineers and is offered as guidance for the deve ...

https://www.eeworm.com/dl/kbcluoji/40131.html

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可编程逻辑  CPLD库指南

Xilinx is disclosing this user guide, manual, release note, and/or specification (the &ldquo;Documentation&rdquo;) to you solely for use in the development of designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit the D ...

https://www.eeworm.com/dl/kbcluoji/40193.html

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可编程逻辑  基于FPGA+DSP模式的智能相机设计

针对嵌入式机器视觉系统向独立化、智能化发展的要求，介绍了一种嵌入式视觉系统--智能相机。基于对智能相机体系结构、组成模块和图像采集、传输和处理技术的分析，对国内外的几款智能相机进行比较。综合技术发展现状，提出基于FPGA+DSP模式的硬件平台，并提出智能相机的发展方向。分析结果表明，该系统设计可以实现脱离PC运 ...

https://www.eeworm.com/dl/kbcluoji/40231.html

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可编程逻辑  基于FPGA的光纤光栅解调系统的研究

&nbsp;波长信号的解调是实现光纤光栅传感网络的关键，基于现有的光纤光栅传感器解调方法，提出一种基于FPGA的双匹配光纤光栅解调方法，此系统是一种高速率、高精度、低成本的解调系统，并且通过引入双匹配光栅有效地克服了双值问题同时扩大了检测范围。分析了光纤光栅的测温原理并给出了该方案软硬件设计，综合考虑系统的解 ...

https://www.eeworm.com/dl/kbcluoji/40240.html

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可编程逻辑  华为 FPGA设计高级技巧Xilinx篇

　　随着HDL Hardware Description Language 硬件描述语言语言综合工具及其它相关工具的推广使广大设计工程师从以往烦琐的画原理图连线等工作解脱开来能够将工作重心转移到功能实现上极大地提高了工作效率任何事务都是一分为二的有利就有弊我们发现现在越来越多的工程师不关心自己的电路实现形式以为我只要将功能描述正确其 ...

https://www.eeworm.com/dl/kbcluoji/40252.html

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可编程逻辑  基于Verilog HDL设计的多功能数字钟

本文利用Verilog HDL 语言自顶向下的设计方法设计多功能数字钟，突出了其作为硬件描述语言的良好的可读性、可移植性和易理解等优点，并通过Altera QuartusⅡ 4.1 和ModelSim SE 6.0 完成综合、仿真。此程序通过下载到FPGA 芯片后，可应用于实际的数字钟显示中。关键词：Verilog HDL；硬件描述语言；FPGA Abstract: In this ...

https://www.eeworm.com/dl/kbcluoji/40390.html