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可编程逻辑 PCB Design Considerations and Guidelines for 0.4mm and 0.5mm WLPs
Abstract: Using a wafer-level package (WLP) can reduce the overall size and cost of your solution.However when using a WLP IC, the printed circuit board (PCB) layout can become more complex and, ifnot carefully planned, result in an unreliable design. This article presents some PCB designconsidera ...
可编程逻辑 使用Nios II紧耦合存储器教程
             使用Nios II紧耦合存储器教程
Chapter 1. Using Tightly Coupled Memory with the Nios II Processor
Reasons for Using Tightly Coupled Memory  . . . . . . . . . . . . . . . . . . . . . . . 1–1
Tradeoffs  . . . . . . . ...
可编程逻辑 Verilog编码中的非阻塞性赋值
 
One of the most misunderstood constructs in the Verilog language is the nonblockingassignment. Even very experienced Verilog designers do not fully understand how nonblockingassignments are scheduled in an IEEE compliant Verilog simulator and do not understand whenand why nonblocking assi ...
可编程逻辑 Verilog Coding Style for Efficient Digital Design
 
In this paper, we discuss efficient coding and design styles using verilog. This can beimmensely helpful for any digital designer initiating designs. Here, we address different problems rangingfrom RTL-Gate Level simulation mismatch to race conditions in writing behavioral models. All the ...
可编程逻辑 SM320 PCB LAYOUT GUIDELINES
Silicon Motion, Inc. has made best efforts to ensure that the information contained in this document is accurate andreliable. However, the information is subject to change without notice. No responsibility is assumed by SiliconMotion, Inc. for the use of this information, nor for infringements of pa ...
可编程逻辑 开关电源EMI设计(英文版)
Integrated EMI/Thermal Design forSwitching Power SuppliesWei ZhangThesis submitted to the Faculty of theVirginia Polytechnic Institute and State Universityin partial fulfillment of the requirements for the degree of
Integrated EMI/Thermal Design forSwitching Power SuppliesWei Zhang(ABSTRACT)This wor ...
可编程逻辑 pcb layout规则
LAYOUT REPORT .............. 1
 
目錄.................. 1
 
 
1. PCB LAYOUT 術語解釋(TERMS)......... 2
 
 
2. Test Point : ATE 測試點供工廠ICT 測試治具使用............ 2
 
 
3. 基準點 (光學點) -for SMD:........... 4
 
 
4. ...
可编程逻辑 pci e PCB设计规范
This document provides practical, common guidelines for incorporating PCI Express interconnect
layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10-
layer or more server baseboard designs. Guidelines and constraints in this document are intended
for use on b ...
手机短信编程 OSERL (Open SMPP Erlang Library) is an erlang implementation of the Short Message Peer to Peer proto
OSERL (Open SMPP Erlang Library) is an erlang implementation of the Short Message Peer to Peer protocol, covering the entire specification (version 5.0). Forward and backward compatibilities guidelines were adopted.
其他书籍 制作本书的目的是为了方便大家的阅读。转载时请保持本电子书的完整性。 前言、条款2、16、21、44根据从Addison-Wesley出版社下载的开放条款翻译。条款26、27、28、45根据从Sc
制作本书的目的是为了方便大家的阅读。转载时请保持本电子书的完整性。
前言、条款2、16、21、44根据从Addison-Wesley出版社下载的开放条款翻译。条款26、27、28、45根据从Scott Meyers的网站下载的《Three Guidelines for Effective Iterator Usage》一文翻译。条款43根据从C/C++ Users Journal网站下载的《STL Algorithm ...