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数值算法/人工智能 Exceptional C++ shows by example how to go about solid software engineering. Along with a lot of oth
Exceptional C++ shows by example how to go about solid software engineering. Along with a lot of other material, this book includes expanded versions of the first 30 issues of the popular Internet C++ feature Guru of the Week (or, in its short form, GotW), a series of self-contained C++ engineering ...
驱动编程 very comprehensive example, windows WDM driver development ex The use of drive technology can s
very comprehensive example,
windows WDM driver development ex
The use of drive technology can s
Say all ?� � e full speed equipm
STM32 DAC DMA TIXINGBO
Implement hiding process, make pr
dma ddk driver
电子书籍 very comprehensive example, windows WDM driver development ex The use of drive technology can s
very comprehensive example,
windows WDM driver development ex
The use of drive technology can s
Say all � � e full speed equipm
STM32 DAC DMA TIXINGBO
Implement hiding process, make pr
dma ddk driver
matlab例程 Specch Recognition system using MATLAB. It includes Viterbi Forwarding and backtracking Algorithm .
Specch Recognition system using MATLAB. It includes Viterbi Forwarding and backtracking Algorithm . First it includes Feature Extraction and then Feature Matching
其他 用C实现栈的InitStack
用C实现栈的InitStack, empty, full, push, pop, clear, getpop。的功能。
Delphi控件源码 *** HyperString v6.0 *** (c)1996-2000 EFD Systems, All rights reserved
*** HyperString v6.0 ***
(c)1996-2000 EFD Systems, All rights reserved
efd@mindspring.com
*** THIS IS NOT PUBLIC DOMAIN SOFTWARE ***
See below for license agreement, disclaimer, installation and use.
Introduction ------------- ...
USB编程 High volume USB 2.0 devices will be designed using ASIC technology with embedded USB 2.0 support. F
High volume USB 2.0 devices will be designed using ASIC technology with embedded USB 2.0 support.
For full-speed USB devices the operating frequency was low enough to allow data recovery to be handled
in a vendors VHDL code, with the ASIC vendor providing only a simple level translator to meet the U ...
VHDL/FPGA/Verilog High volume USB 2.0 devices will be designed using ASIC technology with embedded USB 2.0 support. F
High volume USB 2.0 devices will be designed using ASIC technology with embedded USB 2.0 support.
For full-speed USB devices the operating frequency was low enough to allow data recovery to be handled
in a vendors VHDL code, with the ASIC vendor providing only a simple level translator to meet the U ...
单片机开发 This is a Document on how to implement DDS on SX Communication controllers by Rho Enterprises with F
This is a Document on how to implement DDS on SX Communication controllers by Rho Enterprises with Full Hardware Diagram and Software Program.
通讯编程文档 Because WDM networks are circuit switched loss networks blocking may occur because of lack of resour
Because WDM networks are circuit switched loss networks blocking may occur because of lack of resources. Also in circuit switched networks many paths use the same links. This toolbox answers the question how different paths with different loads influence on each other and what is the blocking on eac ...